Gabe Black ff4b675fb8 arch-arm,cpu: Remove all uses of flattenRegId. ...

RegIds can now be flattened directly.

Change-Id: I2a603c12bbc586720082363996f303cd3b43ac9c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51233
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2022-08-20 01:14:13 +00:00

..

amdgpu

gpu-compute: Adding support for LDS atomics

2022-08-19 16:44:31 +00:00

arm

arch-arm,cpu: Remove all uses of flattenRegId.

2022-08-20 01:14:13 +00:00

generic

arch: Bump MaxVecRegLenInBytes to 2^16

2022-08-19 02:48:36 +00:00

isa_parser

python: Apply Black formatter to Python files

2022-08-03 09:10:41 +00:00

mips

arch,cpu: Replace calls to (get|set)RegFlat.

2022-08-20 01:13:29 +00:00

null

arch: Eliminate the vecregs.hh switching header file.

2022-08-04 20:22:59 +00:00

power

arch: Eliminate the vecregs.hh switching header file.

2022-08-04 20:22:59 +00:00

riscv

arch-riscv: Remove one of two BasicDecode per atomic insts format

2022-08-19 02:49:28 +00:00

sparc

arch-sparc: Implement RegClass based register flattening.

2022-08-20 01:13:13 +00:00

x86

arch,cpu: Replace calls to (get|set)RegFlat.

2022-08-20 01:13:29 +00:00

micro_asm_test.py

python: Apply Black formatter to Python files

2022-08-03 09:10:41 +00:00

micro_asm.py

python: Apply Black formatter to Python files

2022-08-03 09:10:41 +00:00

SConscript

arch: Eliminate the vecregs.hh switching header file.

2022-08-04 20:22:59 +00:00

SConsopts

scons: Make all sticky variables automatically exported.

2022-03-15 00:45:30 +00:00