arch-riscv: Remove one of two BasicDecode per atomic insts format

BasicDecode, or decode block templates in general, contains the template
for substituting the return statement returning a StaticInst given a
machine code.

In the case of micro-coding an instruction, this return statement is for
the macro op. Additionally, in gem5 riscv, the spawned micro-ops will be
added in the macro op constructor, which is done in the macro-op
constructor template. Thus, there's no need for having a return statement
for the micro-op.

Currently, there are two return statements in decode-method.cc.inc for
each riscv atomic inst. This change removes one of the two BasicDecode
blocks in atomic inst templates.

This change is expected to a cosmetic change.

Change-Id: Id14bde25d5d3f164b4faafd33bfd5c802a94ca09
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62492
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/riscv/isa/formats/amo.isa

@@ -450,7 +450,6 @@ def format LoadReserved(memacc_code, postacc_code={{ }}, ea_code={{EA = Rs1;}},
 
     header_output += LRSCMicroDeclare.subst(iop)
     decoder_output += LRSCMicroConstructor.subst(iop)
-    decode_block += BasicDecode.subst(iop)
     exec_output += LoadReservedExecute.subst(iop) \
         + LoadReservedInitiateAcc.subst(iop) \
         + LoadReservedCompleteAcc.subst(iop)
@@ -478,7 +477,6 @@ def format StoreCond(memacc_code, postacc_code={{ }}, ea_code={{EA = Rs1;}},
 
     header_output += LRSCMicroDeclare.subst(iop)
     decoder_output += LRSCMicroConstructor.subst(iop)
-    decode_block += BasicDecode.subst(iop)
     exec_output += StoreCondExecute.subst(iop) \
         + StoreCondInitiateAcc.subst(iop) \
         + StoreCondCompleteAcc.subst(iop)
@@ -510,7 +508,6 @@ def format AtomicMemOp(memacc_code, amoop_code, postacc_code={{ }},
 
     header_output += AtomicMemOpRMWDeclare.subst(rmw_iop)
     decoder_output += AtomicMemOpRMWConstructor.subst(rmw_iop)
-    decode_block += BasicDecode.subst(rmw_iop)
     exec_output += AtomicMemOpRMWExecute.subst(rmw_iop) \
                  + AtomicMemOpRMWInitiateAcc.subst(rmw_iop) \
                  + AtomicMemOpRMWCompleteAcc.subst(rmw_iop)