Gabe Black 0dade68dae arch,cpu,gpu-compute: Further simplify VecRegContainer. ...

Get rid of VecRegT, and a few redundant or unused methods.

Change-Id: I6c88c40653e1939fe74b8ffb847ef50ab8064670
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41995
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2021-04-10 07:31:23 +00:00

..

insts

cpu: Use a unique_ptr to manage cached disassembly.

2021-03-16 11:04:39 +00:00

isa

arch-power: Pull non-public information out of registers.hh.

2021-04-10 01:11:21 +00:00

linux

misc: Fix remaining opening braces

2021-04-07 01:29:31 +00:00

regs

arch-power: Pull non-public information out of registers.hh.

2021-04-10 01:11:21 +00:00

decoder.cc

arch: Templatize the BasicDecodeCache.

2021-02-03 03:54:34 +00:00

decoder.hh

arch: Make some internal decode methods protected.

2021-03-11 14:48:44 +00:00

faults.hh

power: Delete the authors lists from the power ISA.

2020-02-18 03:36:00 +00:00

interrupts.hh

misc: Remove unused params() definitions

2021-02-19 23:27:34 +00:00

isa.cc

arch-power: Pull non-public information out of registers.hh.

2021-04-10 01:11:21 +00:00

isa.hh

arch-power: Pull non-public information out of registers.hh.

2021-04-10 01:11:21 +00:00

locked_mem.hh

arch: Don't add contents to the TheISA namespace in arch/generic.

2020-08-20 01:36:24 +00:00

mmu.hh

misc: Standardize the way create() constructs SimObjects.

2020-10-14 12:06:44 +00:00

page_size.hh

arch,dev,gpu-compute,sim: Rename isa_traits.hh page_size.hh.

2021-03-30 10:17:48 +00:00

pagetable.cc

power: Delete the authors lists from the power ISA.

2020-02-18 03:36:00 +00:00

pagetable.hh

arch,dev,gpu-compute,sim: Rename isa_traits.hh page_size.hh.

2021-03-30 10:17:48 +00:00

PowerInterrupts.py

power: Delete the authors lists from the power ISA.

2020-02-18 03:36:00 +00:00

PowerISA.py

power: Delete the authors lists from the power ISA.

2020-02-18 03:36:00 +00:00

PowerMMU.py

arch: Add generic BaseMMU

2020-10-07 10:48:14 +00:00

PowerSeWorkload.py

power: Implement an SE workload for Linux.

2020-10-26 20:32:03 +00:00

PowerTLB.py

power: Delete the authors lists from the power ISA.

2020-02-18 03:36:00 +00:00

process.cc

arch-power: Pull non-public information out of registers.hh.

2021-04-10 01:11:21 +00:00

process.hh

power: Implement an SE workload for Linux.

2020-10-26 20:32:03 +00:00

registers.hh

arch,cpu,gpu-compute: Further simplify VecRegContainer.

2021-04-10 07:31:23 +00:00

remote_gdb.cc

arch-power: Stop "using namespace std"

2021-01-25 10:46:14 +00:00

remote_gdb.hh

arch-power: Pull non-public information out of registers.hh.

2021-04-10 01:11:21 +00:00

SConscript

arch,cpu: Move TheISA::copyRegs to TheISA::ISA::copyRegsFrom.

2021-03-22 21:01:33 +00:00

SConsopts

power: Delete the authors lists from the power ISA.

2020-02-18 03:36:00 +00:00

se_workload.cc

power: Implement an SE workload for Linux.

2020-10-26 20:32:03 +00:00

se_workload.hh

arch-power: Pull non-public information out of registers.hh.

2021-04-10 01:11:21 +00:00

stacktrace.hh

arch,cpu: Consolidate most of the StackTrace classes into a base class.

2020-07-11 00:24:38 +00:00

tlb.cc

arch,cpu,kern,sim: Eliminate the utility.hh switching header.

2021-03-22 21:01:58 +00:00

tlb.hh

arch,dev,gpu-compute,sim: Rename isa_traits.hh page_size.hh.

2021-03-30 10:17:48 +00:00

types.hh

misc: Fix coding style for struct's opening braces

2021-03-19 20:57:24 +00:00