Gabe Black 802f14bb52 arch-x86: Implement popping into a stack selector in real mode. ...

Segmentation is relatively easy to deal with in real mode, vs. protected
mode.

Change-Id: I4b93a7e321d5debb7240b002bb42fdecaafbfdfe
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55590
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2022-02-26 07:30:24 +00:00

..

amdgpu

arch-x86: Overhaul how address size is handled, particularly for stack.

2022-02-26 01:58:23 +00:00

arm

arm: Replace readVecPredReg with getReg in the tarmac tracer.

2022-02-24 00:10:17 +00:00

generic

cpu,arch: Turn the read|set*Operand methods into get/setRegOperand.

2022-02-19 20:23:51 +00:00

isa_parser

arch: Stop using TheISA:: in the ISA parser.

2022-02-24 09:10:26 +00:00

mips

cpu,arch: Attach a debug flag to each RegClass.

2022-02-24 00:10:17 +00:00

null

arch: Remove TheISA::VecElem from arch/vecregs.hh.

2022-02-01 18:48:55 +00:00

power

cpu,arch: Attach a debug flag to each RegClass.

2022-02-24 00:10:17 +00:00

riscv

arch-riscv: Fix a typo in fsgnjn_s decoder

2022-02-24 12:30:11 +00:00

sparc

cpu,arch: Attach a debug flag to each RegClass.

2022-02-24 00:10:17 +00:00

x86

arch-x86: Implement popping into a stack selector in real mode.

2022-02-26 07:30:24 +00:00

micro_asm_test.py

misc: Use python 3's argumentless super().

2021-11-09 13:04:44 +00:00

micro_asm.py

scons: Work around a SCons bug in Glob.

2022-02-15 22:55:35 +00:00

SConscript

scons: Work around a SCons bug in Glob.

2022-02-15 22:55:35 +00:00

SConsopts

scons: Turn the ISA and GPU ISA lists into construction variables.

2021-08-07 03:12:56 +00:00