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6acb68797562fbfac983a408d1fc2653658e63d7
gem5/src/sim
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Johnny 6acb687975 sim: provide a signal constructor with an init_state 
1. The current SignalSinkPort and SignalSourcePort have no
   ways to assign the init value of the state. Add a new constructor
   for them with the param init_state
2. After the source and sink are bound, the state at both side should
   be the same. Set the the state of sink to the state of source in the
   bind() function.

Change-Id: Idde0a12aa0ddd0c9c599ef47059674fb12aa5d68
2023-08-23 10:12:41 +08:00
..
guest_abi
sim,arch: Remove the GuestABI namespace
2023-01-17 09:16:20 +00:00
power
base: Remove the Stats namespace
2023-01-17 09:16:20 +00:00
probe
sim: Remove the ProbePoints namespace
2023-01-17 09:16:20 +00:00
async.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
async.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
aux_vector.hh
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
backtrace_glibc.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
backtrace_none.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
backtrace.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
bufval.cc
sim: Add some helpers for working with values in buffers.
2022-02-26 09:56:26 +00:00
bufval.hh
sim: Add some helpers for working with values in buffers.
2022-02-26 09:56:26 +00:00
bufval.test.cc
sim: Avoid -Werror=unused-variable in bufval unittests
2022-03-02 08:19:58 +00:00
byteswap.hh
misc: Replace type_traits.hh XX::value with XX_v.
2021-07-28 01:48:03 +00:00
byteswap.test.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
clock_domain.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
clock_domain.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
ClockDomain.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
clocked_object.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
clocked_object.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
ClockedObject.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
core.cc
sim: Remove a couple of deprecated namespaces
2023-01-17 09:16:20 +00:00
core.hh
sim: Remove a couple of deprecated namespaces
2023-01-17 09:16:20 +00:00
cur_tick.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
cur_tick.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
cxx_config_ini.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
cxx_config_ini.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
cxx_config.cc
scons,sim: Eliminate the generated cxx_config/init.cc file.
2022-01-13 05:21:41 +00:00
cxx_config.hh
scons,sim: Eliminate the generated cxx_config/init.cc file.
2022-01-13 05:21:41 +00:00
cxx_manager.cc
scons,sim: Eliminate the generated cxx_config/init.cc file.
2022-01-13 05:21:41 +00:00
cxx_manager.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
debug.cc
sim: allow specifying remote gdb port for each workload
2022-11-03 05:34:09 +00:00
debug.hh
sim: allow specifying remote gdb port for each workload
2022-11-03 05:34:09 +00:00
drain.cc
misc: Rename Debug namespace as debug
2021-07-07 23:18:59 +00:00
drain.hh
misc: Run pre-commit run on all files in repo
2022-08-24 21:47:07 +00:00
dvfs_handler.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
dvfs_handler.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
DVFSHandler.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
emul_driver.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
eventq.cc
systemc: fix -Wno-free-nonheap-object for building scheduler.cc
2023-01-13 05:58:51 +00:00
eventq.hh
sim: Deprecate pointer version of MemberEventWrapper constructor
2023-03-13 06:47:09 +00:00
faults.cc
base,sim,ext: Adding GDB signals definition
2022-11-22 10:45:30 +00:00
faults.hh
misc: Include static_inst_fwd.hh in sim/faults.hh.
2021-10-01 04:57:56 +00:00
fd_array.cc
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
fd_array.hh
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
fd_entry.cc
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
fd_entry.hh
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
full_system.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
futex_map.cc
sim: Fix erasure ordering in the futex map.
2022-06-03 07:23:18 +00:00
futex_map.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
global_event.cc
misc: Remove sim/cur_tick dependency from sim/core.hh
2021-07-06 09:59:11 +00:00
global_event.hh
sim: Add missing virtual destructor to GlobalSyncEvent
2022-11-29 18:54:12 +00:00
globals.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
globals.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
globals.test.cc
sim,tests: Add unit test for Globals
2022-02-09 10:24:54 +00:00
guest_abi.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
guest_abi.test.cc
sim,arch: Remove the GuestABI namespace
2023-01-17 09:16:20 +00:00
init_signals.cc
base: Output link to common errors page
2023-05-26 04:42:25 +00:00
init_signals.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
init.cc
sim: Make the EmbeddedPyBind::initAll method work correctly.
2021-12-16 01:57:26 +00:00
init.hh
sim: Make the EmbeddedPyBind::initAll method work correctly.
2021-12-16 01:57:26 +00:00
insttracer.hh
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
InstTracer.py
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
kernel_workload.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
kernel_workload.hh
arch,sim: Add a byteOrder accessor to the Workload class.
2021-11-18 07:09:00 +00:00
linear_solver.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
linear_solver.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
main.cc
sim,python: follow the new CPython startup sequence
2023-07-10 23:00:31 +00:00
mathexpr.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
mathexpr.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
mem_pool.cc
sim: Fix Mempool overrides during checkpoint
2022-03-29 07:13:44 +00:00
mem_pool.hh
misc: Remove AMD license addition
2021-12-11 04:00:56 +00:00
mem_state.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
mem_state.hh
sim,sim-se: Fix restoring of VMAs of memory-mapped files
2022-12-15 21:38:01 +00:00
port.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
port.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
port.test.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
power_domain.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
power_domain.hh
sim: Switch from EventWrapper to MemberEventWrapper before deprec
2023-03-13 06:47:09 +00:00
power_state.cc
misc: Remove sim/cur_tick dependency from sim/core.hh
2021-07-06 09:59:11 +00:00
power_state.hh
misc: Remove sim/cur_tick dependency from sim/core.hh
2021-07-06 09:59:11 +00:00
PowerDomain.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
PowerState.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
process_impl.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
process.cc
sim,sim-se: Fixes the bug of missing "/" in path resolution
2022-10-18 05:49:24 +00:00
process.hh
base: Remove the Loader namespace
2023-01-17 09:16:20 +00:00
Process.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
proxy_ptr.hh
sim,arch: Remove the GuestABI namespace
2023-01-17 09:16:20 +00:00
proxy_ptr.test.cc
sim,arch: Remove the GuestABI namespace
2023-01-17 09:16:20 +00:00
pseudo_inst.cc
sim: Remove a couple of deprecated namespaces
2023-01-17 09:16:20 +00:00
pseudo_inst.hh
sim: Remove a couple of deprecated namespaces
2023-01-17 09:16:20 +00:00
py_interact.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
py_interact.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
python.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
redirect_path.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
redirect_path.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
RedirectPath.py
misc: Run pre-commit run on all files in repo
2022-08-24 21:47:07 +00:00
root.cc
sim: Don't serialize a root.isa string in checkpoints.
2021-07-31 18:06:52 +00:00
root.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
Root.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
SConscript
sim: Add some helpers for setting up Signal*Ports in python.
2023-02-02 01:01:56 +00:00
SConsopts
scons: fix systrace header test
2022-10-18 12:11:25 +00:00
se_signal.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
se_signal.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
se_workload.cc
sim: Fix Mempool overrides during checkpoint
2022-03-29 07:13:44 +00:00
se_workload.hh
sim: Fix Mempool overrides during checkpoint
2022-03-29 07:13:44 +00:00
serialize_handlers.hh
misc: Replace type_traits.hh XX::value with XX_v.
2021-07-28 01:48:03 +00:00
serialize_handlers.test.cc
sim: Fix serialize_handlers.test.cc on Arm platforms
2022-09-13 08:46:56 +00:00
serialize.cc
base: Unit tests miscellaneous patches (#73)
2023-07-19 08:45:29 -07:00
serialize.hh
sim: Explicitly specify the namespace of serialization helpers.
2021-08-28 04:18:12 +00:00
serialize.test.cc
sim,tests: Add unit test for sim/serialize.hh
2021-09-22 05:31:01 +00:00
signal.hh
sim: provide a signal constructor with an init_state
2023-08-23 10:12:41 +08:00
SignalPort.py
sim: Add some helpers for setting up Signal*Ports in python.
2023-02-02 01:01:56 +00:00
sim_events.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
sim_events.hh
base,sim: Adding monitor function to GDB
2022-11-22 16:02:53 +00:00
sim_exit.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
sim_object.cc
sim: Remove unused SimObject::debugObjectBreak
2023-03-21 06:53:55 +00:00
sim_object.hh
sim: Remove unused SimObject::debugObjectBreak
2023-03-21 06:53:55 +00:00
simulate.cc
sim: handle async events in main thread only
2023-02-08 00:28:02 +00:00
simulate.hh
python: Remove 'scheduleTickExit' in favor of 'exitSimLoop'
2022-12-06 18:04:46 +00:00
stat_control.cc
base: Remove the Stats namespace
2023-01-17 09:16:20 +00:00
stat_control.hh
base: Remove the Stats namespace
2023-01-17 09:16:20 +00:00
stat_register.cc
base: Remove the Stats namespace
2023-01-17 09:16:20 +00:00
stat_register.hh
base: Remove the Stats namespace
2023-01-17 09:16:20 +00:00
stats.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
stats.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
sub_system.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
sub_system.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
SubSystem.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
syscall_abi.hh
sim,arch: Remove the GuestABI namespace
2023-01-17 09:16:20 +00:00
syscall_debug_macros.hh
sim: Delete authors lists from files in sim.
2020-02-18 03:34:31 +00:00
syscall_desc.cc
sim-se: (Re)add support for retrying system calls.
2021-12-17 05:45:26 +00:00
syscall_desc.hh
sim-se: (Re)add support for retrying system calls.
2021-12-17 05:45:26 +00:00
syscall_emul_buf.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
syscall_emul.cc
sim-se: Implement mknodat syscall
2021-10-20 15:10:45 +00:00
syscall_emul.hh
arch-x86,sim-se: Add clone3 syscall
2022-10-27 23:57:43 +00:00
syscall_return.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
system.cc
mem,arch-arm,mem-ruby,cpu: Remove use of deprecated base port owner
2023-02-03 06:11:45 +00:00
system.hh
sim: Suppress deleted operator= warn in Sys::Threads::const_it
2023-02-03 06:11:45 +00:00
System.py
python: Fix multiline quotes in a single line
2022-11-29 23:44:38 +00:00
ticked_object.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
ticked_object.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
TickedObject.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
vma.cc
sim,sim-se: Fix restoring of VMAs of memory-mapped files
2022-12-15 21:38:01 +00:00
vma.hh
sim,sim-se: Fix restoring of VMAs of memory-mapped files
2022-12-15 21:38:01 +00:00
voltage_domain.cc
mem,sim: Replace the deprecated chatty_assert with gem5_assert.
2021-08-21 00:54:54 +00:00
voltage_domain.hh
mem,sim: Replace the deprecated chatty_assert with gem5_assert.
2021-08-21 00:54:54 +00:00
VoltageDomain.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
workload.cc
base,cpu,dev,sim: Pull common logic into ListenSocket::listen().
2023-03-29 03:05:06 +00:00
workload.hh
base,sim,ext: Adding GDB signals definition
2022-11-22 10:45:30 +00:00
Workload.py
arch,base,dev,sim: Convert objects to use the HostSocket param type.
2023-04-12 02:18:22 +00:00