arch,sim: Add a byteOrder accessor to the Workload class.

The workload would have a better idea of what it's endianness is than
the system object that holds it. This is the first step towards getting
rid of the getByteOrder method on the system object, which currently
checks TARGET_ISA to determine what the default endianness should be.

If it makes sense for a Workload, it could determine the endianness
dynamically by, for instance, reading it out of a binary image before
putting it into memory.

This does assume that the workload has a consistent endianness
throughout which may not be true, but this is not a new assumption.

Also, mark the SEWorkload SimObject class as "abstract", since it isn't
useful until they get subclassed by some arch specific version.

Change-Id: I8d4ba8382f22236a81f9738cc3506cdb97bdbfb2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52104
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/arm/freebsd/se_workload.hh

@@ -55,6 +55,8 @@ class EmuFreebsd : public SEWorkload
 
     EmuFreebsd(const Params &p) : SEWorkload(p, PageShift) {}
 
+    ByteOrder byteOrder() const override { return ByteOrder::little; }
+
     struct BaseSyscallABI {};
     struct SyscallABI32 : public SEWorkload::SyscallABI32,
                           public BaseSyscallABI

src/arch/arm/fs_workload.hh

@@ -143,6 +143,8 @@ class FsWorkload : public KernelWorkload
             return loader::Arm64;
     }
 
+    ByteOrder byteOrder() const override { return ByteOrder::little; }
+
     FsWorkload(const Params &p);
 
     void initState() override;

src/arch/arm/linux/se_workload.hh

@@ -47,6 +47,7 @@ class EmuLinux : public SEWorkload
     using Params = ArmEmuLinuxParams;
 
     EmuLinux(const Params &p) : SEWorkload(p, PageShift) {}
+    ByteOrder byteOrder() const override { return ByteOrder::little; }
 
     struct BaseSyscallABI {};
     struct SyscallABI32 : public SEWorkload::SyscallABI32,

src/arch/mips/linux/se_workload.hh

@@ -51,6 +51,7 @@ class EmuLinux : public SEWorkload
     using Params = MipsEmuLinuxParams;
 
     EmuLinux(const Params &p) : SEWorkload(p, PageShift) {}
+    ByteOrder byteOrder() const override { return ByteOrder::little; }
 
     void syscall(ThreadContext *tc) override;
 };

src/arch/power/linux/se_workload.hh

@@ -53,6 +53,8 @@ class EmuLinux : public SEWorkload
 
     EmuLinux(const Params &p) : SEWorkload(p, PageShift) {}
 
+    ByteOrder byteOrder() const override { return ByteOrder::big; }
+
     void syscall(ThreadContext *tc) override;
 };
 

src/arch/riscv/bare_metal/fs_workload.hh

@@ -64,6 +64,7 @@ class BareMetal : public Workload
     }
 
     loader::Arch getArch() const override { return bootloader->getArch(); }
+    ByteOrder byteOrder() const override { return ByteOrder::little; }
 
     const loader::SymbolTable &
     symtab(ThreadContext *tc) override

src/arch/riscv/linux/fs_workload.hh

@@ -53,6 +53,8 @@ class FsLinux : public KernelWorkload
         KernelWorkload::setSystem(sys);
         gdb = BaseRemoteGDB::build<RemoteGDB>(system);
     }
+
+    ByteOrder byteOrder() const override { return ByteOrder::little; }
 };
 
 } // namespace RiscvISA

src/arch/riscv/linux/se_workload.hh

@@ -57,6 +57,8 @@ class EmuLinux : public SEWorkload
 
     EmuLinux(const Params &p) : SEWorkload(p, PageShift) {}
 
+    ByteOrder byteOrder() const override { return ByteOrder::little; }
+
     void syscall(ThreadContext *tc) override;
 };
 

src/arch/sparc/fs_workload.hh

@@ -64,6 +64,7 @@ class FsWorkload : public Workload
         return pc;
     }
     loader::Arch getArch() const override { return loader::SPARC64; }
+    ByteOrder byteOrder() const override { return ByteOrder::big; }
 
     const loader::SymbolTable &
     symtab(ThreadContext *tc) override

src/arch/sparc/linux/se_workload.hh

@@ -58,6 +58,7 @@ class EmuLinux : public SEWorkload
     EmuLinux(const Params &p);
 
     loader::Arch getArch() const override { return loader::SPARC64; }
+    ByteOrder byteOrder() const override { return ByteOrder::big; }
 
     void handleTrap(ThreadContext *tc, int trapNum) override;
     void syscall(ThreadContext *tc) override;

src/arch/x86/fs_workload.hh

@@ -91,6 +91,8 @@ class FsWorkload : public KernelWorkload
         gdb = BaseRemoteGDB::build<RemoteGDB>(system);
     }
 
+    ByteOrder byteOrder() const override { return ByteOrder::little; }
+
   protected:
 
     smbios::SMBiosTable *smbiosTable;

src/arch/x86/linux/se_workload.hh

@@ -68,6 +68,7 @@ class EmuLinux : public SEWorkload
     }
 
     loader::Arch getArch() const override { return loader::X86_64; }
+    ByteOrder byteOrder() const override { return ByteOrder::little; }
 
     void syscall(ThreadContext *tc) override;
     void event(ThreadContext *tc) override;

src/sim/Workload.py

@@ -43,6 +43,8 @@ class StubWorkload(Workload):
     cxx_class = 'gem5::StubWorkload'
 
     entry = Param.Addr(0, 'Dummy entry point for this workload.')
+    byte_order = Param.ByteOrder('little',
+            'Dummy byte order for this workload.')
 
 class KernelWorkload(Workload):
     type = 'KernelWorkload'
@@ -74,6 +76,7 @@ class SEWorkload(Workload, metaclass=SEWorkloadMeta):
     type = 'SEWorkload'
     cxx_header = "sim/se_workload.hh"
     cxx_class = 'gem5::SEWorkload'
+    abstract = True
 
     @classmethod
     def _is_compatible_with(cls, obj):

src/sim/kernel_workload.hh

@@ -84,6 +84,7 @@ class KernelWorkload : public Workload
     KernelWorkload(const Params &p);
 
     Addr getEntry() const override { return kernelObj->entryPoint(); }
+    ByteOrder byteOrder() const override { return kernelObj->getByteOrder(); }
     loader::Arch
     getArch() const override
     {

src/sim/workload.hh

@@ -33,6 +33,7 @@
 
 #include "base/loader/object_file.hh"
 #include "base/loader/symtab.hh"
+#include "enums/ByteOrder.hh"
 #include "params/StubWorkload.hh"
 #include "params/Workload.hh"
 #include "sim/sim_object.hh"
@@ -98,6 +99,7 @@ class Workload : public SimObject
     void startup() override;
 
     virtual Addr getEntry() const = 0;
+    virtual ByteOrder byteOrder() const = 0;
     virtual loader::Arch getArch() const = 0;
 
     virtual const loader::SymbolTable &symtab(ThreadContext *tc) = 0;
@@ -170,6 +172,7 @@ class StubWorkload : public Workload
     StubWorkload(const StubWorkloadParams &params) : Workload(params) {}
 
     Addr getEntry() const override { return params().entry; }
+    ByteOrder byteOrder() const override { return params().byte_order; }
     loader::Arch getArch() const override { return loader::UnknownArch; }
     const loader::SymbolTable &
     symtab(ThreadContext *tc) override