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mem,sim: Replace the deprecated chatty_assert with gem5_assert.

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The new gem5_assert macro now does the job of both regular asserts, and
chatty_assert, except that its condition must always be valid code. It
is still not evaluated if NDEBUG is set, though.

Change-Id: I7c9435311746b2e02fe7335bce6ba618bf9fd4eb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48607
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
This commit is contained in:
Gabe Black
2021-07-26 20:16:22 -07:00
parent b8b9db1508
commit e90cb8ab75
5 changed files with 24 additions and 23 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
src/mem/cache/base.cc vendored
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@@ -1157,9 +1157,9 @@ BaseCache::access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat,
// sanity check
assert(pkt->isRequest());
chatty_assert(!(isReadOnly && pkt->isWrite()),
"Should never see a write in a read-only cache %s\n",
name());
gem5_assert(!(isReadOnly && pkt->isWrite()),
"Should never see a write in a read-only cache %s\n",
name());
// Access block in the tags
Cycles tag_latency(0);
@@ -1502,8 +1502,8 @@ BaseCache::handleFill(PacketPtr pkt, CacheBlk *blk, PacketList &writebacks,
// owners copy
blk->setCoherenceBits(CacheBlk::DirtyBit);
chatty_assert(!isReadOnly, "Should never see dirty snoop response "
"in read-only cache %s\n", name());
gem5_assert(!isReadOnly, "Should never see dirty snoop response "
"in read-only cache %s\n", name());
}
}
@@ -1616,8 +1616,8 @@ BaseCache::evictBlock(CacheBlk *blk, PacketList &writebacks)
PacketPtr
BaseCache::writebackBlk(CacheBlk *blk)
{
chatty_assert(!isReadOnly || writebackClean,
"Writeback from read-only cache");
gem5_assert(!isReadOnly || writebackClean,
"Writeback from read-only cache");
assert(blk && blk->isValid() &&
(blk->isSet(CacheBlk::DirtyBit) || writebackClean));

8
src/mem/cache/cache.cc vendored
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@@ -165,9 +165,9 @@ Cache::access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat,
if (pkt->req->isUncacheable()) {
assert(pkt->isRequest());
chatty_assert(!(isReadOnly && pkt->isWrite()),
"Should never see a write in a read-only cache %s\n",
name());
gem5_assert(!(isReadOnly && pkt->isWrite()),
"Should never see a write in a read-only cache %s\n",
name());
DPRINTF(Cache, "%s for %s\n", __func__, pkt->print());
@@ -1104,7 +1104,7 @@ Cache::handleSnoop(PacketPtr pkt, CacheBlk *blk, bool is_timing,
// xbar.
respond = blk->isSet(CacheBlk::DirtyBit) && pkt->needsResponse();
chatty_assert(!(isReadOnly && blk->isSet(CacheBlk::DirtyBit)),
gem5_assert(!(isReadOnly && blk->isSet(CacheBlk::DirtyBit)),
"Should never have a dirty block in a read-only cache %s\n",
name());
}

2
src/mem/mem_checker.cc
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@@ -53,7 +53,7 @@ MemChecker::WriteCluster::startWrite(MemChecker::Serial serial, Tick _start,
// Initialize a fresh write cluster
start = _start;
}
chatty_assert(start <= _start, "WriteClusters must filled in order!");
gem5_assert(start <= _start, "WriteClusters must filled in order!");
++numIncomplete;

15
src/sim/voltage_domain.cc
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@@ -64,9 +64,9 @@ VoltageDomain::VoltageDomain(const Params &p)
void
VoltageDomain::perfLevel(PerfLevel perf_level)
{
chatty_assert(perf_level < voltageOpPoints.size(),
"DVFS: Requested voltage ID %d is outside the known "\
"range for domain %s.\n", perf_level, name());
gem5_assert(perf_level < voltageOpPoints.size(),
"DVFS: Requested voltage ID %d is outside the known "\
"range for domain %s.\n", perf_level, name());
if (perf_level == _perfLevel) {
// Silently ignore identical overwrites
@@ -88,11 +88,12 @@ VoltageDomain::sanitiseVoltages()
// Find the highest requested performance level and update the voltage
// domain with it
PerfLevel perf_max = (PerfLevel)-1;
for (auto dit = srcClockChildren.begin(); dit != srcClockChildren.end(); ++dit) {
for (auto dit = srcClockChildren.begin(); dit != srcClockChildren.end();
++dit) {
SrcClockDomain* d = *dit;
chatty_assert(d->voltageDomain() == this, "DVFS: Clock domain %s "\
"(id: %d) should not be registered with voltage domain "\
"%s\n", d->name(), d->domainID(), name());
gem5_assert(d->voltageDomain() == this, "DVFS: Clock domain %s "\
"(id: %d) should not be registered with voltage domain "\
"%s\n", d->name(), d->domainID(), name());
PerfLevel perf = d->perfLevel();

8
src/sim/voltage_domain.hh
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@@ -77,10 +77,10 @@ class VoltageDomain : public SimObject
*/
double voltage(PerfLevel perf_level) const
{
chatty_assert(perf_level < numVoltages(), "VoltageDomain %s "\
"request for voltage perf level %u is outside "\
"of numVoltages %u", name(), perf_level,
numVoltages());
gem5_assert(perf_level < numVoltages(), "VoltageDomain %s "\
"request for voltage perf level %u is outside "\
"of numVoltages %u", name(), perf_level,
numVoltages());
return voltageOpPoints[perf_level];
}