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59f96deb0fff522134f1e73753a7e526e7fe5c7a
gem5/src/cpu
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Andreas Sandberg 59f96deb0f cpu: Refactor indirect predictor (#429)
2023-10-13 11:35:02 +01:00
..
checker
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
kvm
cpu-kvm: Make using perf when using KVM CPU optional (#95)
2023-07-20 10:34:44 -07:00
minor
cpu-minor: Separate the reg_index of VecClassReg and VecElemReg
2023-08-24 13:27:27 +08:00
o3
misc: Update gem5 to use clang-15 and clang-16 (#365)
2023-10-04 09:51:12 -07:00
pred
cpu: Refactor indirect predictor
2023-10-11 07:50:32 +00:00
probes
cpu: Allow PcCountTracker to compile in NULL ISA
2023-03-03 05:20:00 +00:00
simple
misc: Fix 'unused variable' clang errors with gem5.fast
2023-05-08 22:54:06 +00:00
testers
misc: Run pre-commit run --all-files
2023-10-10 14:01:58 -07:00
trace
cpu: Add override to TraceCPU init function
2023-09-21 10:11:39 -07:00
activity.cc
misc: Fix 'unused variable' clang errors with gem5.fast
2023-05-08 22:54:06 +00:00
activity.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
base.cc
cpu: Remove duplicate base inst and op stats
2023-05-08 19:09:51 +00:00
base.hh
cpu-o3: Copy O3 IEW stats to BaseCPU::ExecuteCPUStats
2023-05-08 19:09:51 +00:00
BaseCPU.py
misc,python: Run pre-commit run --all-files
2023-10-10 21:47:07 -07:00
CheckerCPU.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
cluster.hh
cpu: Formalize a CPU cluster class in the gem5 standard library
2023-01-13 12:07:51 +00:00
CpuCluster.py
cpu: Add CpuCluster method to allow querying the number of CPUs.
2023-04-13 21:09:36 +00:00
CPUTracers.py
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
decode_cache.hh
cpu: Remove the DecodeCache namespace
2023-01-17 09:16:20 +00:00
dummy_checker.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
DummyChecker.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
exec_context.hh
misc: Stop including config/the_isa.hh.
2022-08-20 07:30:32 +00:00
exetrace.cc
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
exetrace.hh
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
func_unit.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
func_unit.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
FuncUnit.py
arch-arm, cpu, configs: Add new Op Classes for Matrix Multiply insts
2023-05-25 21:36:39 +00:00
inst_pb_trace.cc
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
inst_pb_trace.hh
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
inst_res.hh
cpu: Simplify and revamp the InstResult class.
2022-08-02 12:44:16 +00:00
inst_seq.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
InstPBTrace.py
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
inteltrace.cc
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
inteltrace.hh
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
nativetrace.cc
base,cpu,dev: Add a level of indirection for ListenSockets.
2023-03-29 07:27:43 +00:00
nativetrace.hh
base,cpu,dev: Add a level of indirection for ListenSockets.
2023-03-29 07:27:43 +00:00
nop_static_inst.cc
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
nop_static_inst.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
null_static_inst.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
null_static_inst.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
op_class.hh
arch-arm, cpu, configs: Add new Op Classes for Matrix Multiply insts
2023-05-25 21:36:39 +00:00
pc_event.cc
misc: Rename Debug namespace as debug
2021-07-07 23:18:59 +00:00
pc_event.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
profile.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
profile.hh
base: Remove the Loader namespace
2023-01-17 09:16:20 +00:00
reg_class.cc
cpu,arch: Put the name of the RegClass into the RegClass.
2022-07-29 19:30:51 +00:00
reg_class.hh
arch,cpu: Add boilerplate support for matrix registers
2023-01-17 10:09:56 +00:00
regfile.hh
cpu: Use arrays and abstraction to handle regs in SimpleThread.
2022-02-24 00:10:17 +00:00
SConscript
cpu: Formalize a CPU cluster class in the gem5 standard library
2023-01-13 12:07:51 +00:00
simple_thread.cc
arch,cpu: Add boilerplate support for matrix registers
2023-01-17 10:09:56 +00:00
simple_thread.hh
arch,cpu: Add boilerplate support for matrix registers
2023-01-17 10:09:56 +00:00
smt.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
static_inst_fwd.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
static_inst.cc
cpu: Add a StaticInst::advancePC which takes a ThreadContext.
2021-12-03 03:05:41 +00:00
static_inst.hh
arch: Add instruction size and PC set methods
2023-10-02 20:10:57 +00:00
StaticInstFlags.py
arch,cpu: Add boilerplate support for matrix registers
2023-01-17 10:09:56 +00:00
thread_context.cc
arch,cpu: Add boilerplate support for matrix registers
2023-01-17 10:09:56 +00:00
thread_context.hh
misc: Stop including config/the_isa.hh.
2022-08-20 07:30:32 +00:00
thread_state.cc
fastmodel,cpu: Eliminate the unused getVirtProxy.
2021-07-23 08:59:36 +00:00
thread_state.hh
cpu,fastmodel: Eliminate the now unnecessary initMemProxies method.
2021-07-23 08:59:54 +00:00
timebuf.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
timing_expr.cc
cpu: Merge TimingExprSrcReg and TimingExprReadIntReg.
2022-06-24 11:26:51 +00:00
timing_expr.hh
cpu: Merge TimingExprSrcReg and TimingExprReadIntReg.
2022-06-24 11:26:51 +00:00
TimingExpr.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
translation.hh
misc: Move Mode and Translation from BaseTLB to BaseMMU
2021-07-07 08:44:13 +00:00
utils.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00