a6e023906e
Change-Id: I84683a3297143102a74ac6dfe744cd5804b83fe4 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45908 Reviewed-by: Gabe Black <gabe.black@gmail.com> Maintainer: Gabe Black <gabe.black@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
78 lines
2.9 KiB
C++
78 lines
2.9 KiB
C++
/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "cpu/thread_state.hh"
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#include "base/output.hh"
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#include "cpu/base.hh"
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#include "mem/port.hh"
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#include "mem/port_proxy.hh"
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#include "mem/se_translating_port_proxy.hh"
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#include "mem/translating_port_proxy.hh"
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#include "sim/full_system.hh"
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#include "sim/serialize.hh"
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#include "sim/system.hh"
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namespace gem5
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{
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ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
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: numInst(0), numOp(0), threadStats(cpu, _tid),
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numLoad(0), startNumLoad(0),
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_status(ThreadContext::Halted), baseCpu(cpu),
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_contextId(0), _threadId(_tid), lastActivate(0), lastSuspend(0),
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process(_process), storeCondFailures(0)
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{
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}
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void
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ThreadState::serialize(CheckpointOut &cp) const
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{
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SERIALIZE_ENUM(_status);
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}
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void
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ThreadState::unserialize(CheckpointIn &cp)
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{
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UNSERIALIZE_ENUM(_status);
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}
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ThreadState::ThreadStateStats::ThreadStateStats(BaseCPU *cpu,
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const ThreadID& tid)
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: statistics::Group(cpu, csprintf("thread_%i", tid).c_str()),
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ADD_STAT(numInsts, statistics::units::Count::get(),
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"Number of Instructions committed"),
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ADD_STAT(numOps, statistics::units::Count::get(),
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"Number of Ops committed"),
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ADD_STAT(numMemRefs, statistics::units::Count::get(),
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"Number of Memory References")
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{
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}
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} // namespace gem5
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