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4ae8d1c0ed18f351b52f421553b28fe109f87665
gem5/src/arch/mips
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Gabe Black 4ae8d1c0ed arch,sim: Merge initCPU into the ISA System classes. 
Those classes are already ISA specific, so we can just move initCPU's
contents there and take it out of utility.hh, utility.cc, and the base
System's initState.

Change-Id: I28f0d0b50d83efe5116b0b24d20f8182a02823e7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24905
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-01 12:31:56 +00:00
..
bare_iron
style: change C/C++ source permissions to noexec
2018-01-10 16:49:23 +00:00
isa
arch,cpu,sim: Push syscall number determination up to processes.
2019-12-10 23:58:14 +00:00
linux
arch,cpu,sim: Push syscall number determination up to processes.
2019-12-10 23:58:14 +00:00
decoder.cc
ISA,CPU: Generalize and split out the components of the decode cache.
2012-05-26 13:45:12 -07:00
decoder.hh
arch,cpu: Move endianness conversion of inst bytes into the ISA.
2019-11-02 00:01:52 +00:00
dsp.cc
style: change C/C++ source permissions to noexec
2018-01-10 16:49:23 +00:00
dsp.hh
style: change C/C++ source permissions to noexec
2018-01-10 16:49:23 +00:00
dt_constants.hh
style: change C/C++ source permissions to noexec
2018-01-10 16:49:23 +00:00
faults.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
faults.hh
base, sim, arch: Fix clang 5.0 warnings
2017-05-19 08:00:45 +00:00
idle_event.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
idle_event.hh
cpu: Create a PCEventScope class to abstract the scope of PCEvents.
2019-10-25 22:42:31 +00:00
interrupts.cc
arch: Make a base class for Interrupts.
2019-10-19 01:45:48 +00:00
interrupts.hh
arch: Make a base class for Interrupts.
2019-10-19 01:45:48 +00:00
isa_traits.hh
arch: Get rid of the (Big|Little)EndianGuest namespaces.
2019-11-18 20:02:31 +00:00
isa.cc
misc: Removed inconsistency in O3* debug msgs
2019-04-03 16:50:22 +00:00
isa.hh
mips: Stop using architecture specific register types.
2019-01-31 11:05:20 +00:00
kernel_stats.hh
stats: Get rid of some kernel stats related cruft.
2017-09-11 04:58:38 +00:00
locked_mem.hh
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
microcode_rom.hh
CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
2008-10-12 15:59:21 -07:00
MipsInterrupts.py
arch: Make a base class for Interrupts.
2019-10-19 01:45:48 +00:00
MipsISA.py
arch, cpu: Add support for flattening misc register indexes.
2014-01-24 15:29:30 -06:00
MipsSystem.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
MipsTLB.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
mmapped_ipr.hh
arch: Add support for m5ops using mmapped IPRs
2013-09-30 12:20:43 +02:00
mt_constants.hh
style: change C/C++ source permissions to noexec
2018-01-10 16:49:23 +00:00
mt.hh
mips: Implement readRegOtherThread and setRegOtherThread directly.
2019-04-29 22:57:37 +00:00
pagetable.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
pagetable.hh
style: change C/C++ source permissions to noexec
2018-01-10 16:49:23 +00:00
pra_constants.hh
style: change C/C++ source permissions to noexec
2018-01-10 16:49:23 +00:00
process.cc
arch: Get rid of the now unused setSyscallArg.
2019-12-10 23:58:14 +00:00
process.hh
arch: Get rid of the now unused setSyscallArg.
2019-12-10 23:58:14 +00:00
pseudo_inst.hh
sim,arch: Collapse the ISA specific versions of m5Syscall.
2019-12-10 23:58:14 +00:00
registers.hh
cpu, arch: Replace the CCReg type with RegVal.
2019-02-01 01:22:19 +00:00
remote_gdb.cc
arch: cpu: Rename *FloatRegBits* to *FloatReg*.
2019-01-31 11:02:05 +00:00
remote_gdb.hh
sim, arch, base: Refactor the base remote GDB class.
2018-01-20 07:28:42 +00:00
SConscript
scons: Stop generating inc.d in the isa parser.
2017-10-17 18:57:50 +00:00
SConsopts
go back and fix up MIPS copyright headers
2007-11-16 21:32:22 -05:00
stacktrace.cc
arch, base, sim: Demote (SE|FS)TranslatingPortProxy &s to PortProxy &s.
2019-05-30 14:20:03 +00:00
stacktrace.hh
arch: Use const StaticInstPtr references where possible
2014-09-27 09:08:36 -04:00
system.cc
arch: Get rid of the (Big|Little)EndianGuest namespaces.
2019-11-18 20:02:31 +00:00
system.hh
mips,riscv: Get rid of some Alpha cruft in these System classes.
2019-10-25 23:53:01 +00:00
tlb.cc
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
tlb.hh
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
types.hh
arch: get rid of unused LargestRead typedef
2016-01-17 18:27:46 -08:00
utility.cc
arch,sim: Merge initCPU into the ISA System classes.
2020-02-01 12:31:56 +00:00
utility.hh
arch,sim: Merge initCPU into the ISA System classes.
2020-02-01 12:31:56 +00:00
vtophys.cc
style: change C/C++ source permissions to noexec
2018-01-10 16:49:23 +00:00
vtophys.hh
Merge with main repository.
2012-01-30 21:07:57 -08:00