4633677145
ISA: Set up common trace flags for tracing registers.
Gabe Black
2009-02-25 10:22:17 -08:00
44d5351071
ISA: Get rid of FlattenIntIndex function.
Gabe Black
2009-02-25 10:22:09 -08:00
c1c61d52a0
SPARC: Get rid of flattenIndex in the int register file.
Gabe Black
2009-02-25 10:21:59 -08:00
ce2e50a64c
ISA: Use the "Stack" traceflag for DPRINTFs about the initial stack frame.
Gabe Black
2009-02-25 10:21:52 -08:00
9d5b6e377f
SPARC: Get rid of the setGlobals function.
Gabe Black
2009-02-25 10:21:46 -08:00
f41ce6b5e9
SPARC: Get rid of the setCWP function.
Gabe Black
2009-02-25 10:21:40 -08:00
88ee7d4c32
SPARC: Add a traceflag for register windows.
Gabe Black
2009-02-25 10:21:33 -08:00
7aa875f4f3
X86: Implement the lldt instruction.
Gabe Black
2009-02-25 10:21:27 -08:00
bda7077c64
X86: Add segmentation checks for ldt related descriptors and selectors.
Gabe Black
2009-02-25 10:21:21 -08:00
e08d60389d
X86: Make the TSS type check actually return a fault if it fails.
Gabe Black
2009-02-25 10:21:14 -08:00
68300cfb8c
X86: Make rdcr use merge and the mov to control register instructions use the right operand size.
Gabe Black
2009-02-25 10:21:08 -08:00
9842f1ca9d
X86: Implement CLTS.
Gabe Black
2009-02-25 10:21:02 -08:00
b035c917a5
X86: Make the segment register reading microops use merge.
Gabe Black
2009-02-25 10:20:47 -08:00
28efb3c6e3
X86: Implement the mov to debug register intructions.
Gabe Black
2009-02-25 10:20:42 -08:00
c39ed53d05
X86: Rename oszForPseudoDesc maxOsz to reflect its more general use.
Gabe Black
2009-02-25 10:20:30 -08:00
3ca2451d81
X86: Add code to interpret debug register values.
Gabe Black
2009-02-25 10:20:25 -08:00
1e70401c08
X86: Fix a few bugs with the segment register instructions in real mode. Fix a few instances where the register form of zext was used where zexti was intended. Also get rid of the 64 bit only rip relative addressed version since 64 bit and real mode are mutually exclusive.
Gabe Black
2009-02-25 10:20:19 -08:00
8813168b5a
X86: Do a merge for the zero extension microop.
Gabe Black
2009-02-25 10:20:10 -08:00
28a35a6adb
X86: Add microops for reading/writing debug registers.
Gabe Black
2009-02-25 10:20:01 -08:00
11fbed02ea
X86: Add classes that break out the bits of the DR6 and DR7 registers.
Gabe Black
2009-02-25 10:19:54 -08:00
cb4141f6e6
X86: Check src1 for illegal values since that's the index we actually use.
Gabe Black
2009-02-25 10:19:47 -08:00
d48214a656
X86: Implement the fence instructions. These are not microcoded.
Gabe Black
2009-02-25 10:19:41 -08:00
9940e21fa9
CPU: Add a flag to identify a read barrier to the static inst class.
Gabe Black
2009-02-25 10:19:33 -08:00
5d5e001ac3
X86: Update stats now that prefetch is implemented.
Gabe Black
2009-02-25 10:19:28 -08:00
06ff83e1b9
X86: Implement a basic prefetch instruction.
Gabe Black
2009-02-25 10:19:22 -08:00
5f0428ef9f
X86: Use the right portion of a register for stores.
Gabe Black
2009-02-25 10:19:14 -08:00
eafdf00eb3
X86: Add IRQ4 to the Intel MP tables.
Gabe Black
2009-02-25 10:19:06 -08:00
c849ef58c0
X86: Actually check page protections.
Gabe Black
2009-02-25 10:18:58 -08:00
f35a37ca9e
X86: Update CS later so stack accesses have the right permission checks.
Gabe Black
2009-02-25 10:18:51 -08:00
1bfab291f1
CPU: Update stats now that there's no fetch in the middle of macroops.
Gabe Black
2009-02-25 10:18:45 -08:00
da61c4b3ee
CPU: Don't fetch when executing a macroop. If the CPL changes mid macroop, the end of the instruction might not be priveleged enough to execute the beginning.
Gabe Black
2009-02-25 10:18:36 -08:00
ba69184630
X86: Use atCPL0 for accesses that are part of CPU machinery.
Gabe Black
2009-02-25 10:18:29 -08:00
dc53ca89f6
X86: Add a flag to force memory accesses to happen at CPL 0.
Gabe Black
2009-02-25 10:18:22 -08:00
897c374892
X86: Move where CS is set so CPL checks work out.
Gabe Black
2009-02-25 10:18:16 -08:00
710b43dfbd
X86: Implement inUserMode for x86.
Gabe Black
2009-02-25 10:18:06 -08:00
1cedc748d4
X86: Add a trace flag for tracing faults.
Gabe Black
2009-02-25 10:17:59 -08:00
eec3f49a57
X86: Implement the sysret instruction in long mode.
Gabe Black
2009-02-25 10:17:54 -08:00
6325245e3e
X86: Implement the longmode versions of the syscall instruction.
Gabe Black
2009-02-25 10:17:49 -08:00
dadc30b0a4
X86: Make the microcode assembler recognize r8-r15.
Gabe Black
2009-02-25 10:17:43 -08:00
fcad6e3b13
X86: Add a wrattr microop.
Gabe Black
2009-02-25 10:17:38 -08:00
e4ede69b2f
X86: Add a trace flag for the page table walker.
Gabe Black
2009-02-25 10:17:27 -08:00
99aa121fca
X86: Make exceptions handle stack switching.
Gabe Black
2009-02-25 10:17:19 -08:00
aa7bc1be74
X86: Implement the LTR instruction.
Gabe Black
2009-02-25 10:17:14 -08:00
08f3a126d5
X86: Fix segment limit checking.
Gabe Black
2009-02-25 10:17:08 -08:00
2f31643db5
X86: Add a check to chks to verify a task state segment descriptor.
Gabe Black
2009-02-25 10:17:02 -08:00
7b1cb74ac3
X86: Add a check to chks which raises #GP(selector) if selector is NULL or not in the GDT.
Gabe Black
2009-02-25 10:16:54 -08:00
82288e7c3e
X86: Add makeAtomicResponse to the read/write functions of x86 devices.
Gabe Black
2009-02-25 10:16:43 -08:00
7462cb0842
X86: Fix the timing mode of the page table walker.
Gabe Black
2009-02-25 10:16:34 -08:00
f02df8cb74
X86: Update stats for in place TLB miss handling.
Gabe Black
2009-02-25 10:16:29 -08:00
40fdba2454
X86: Make the X86 TLB take advantage of delayed translations, and get rid of the fake TLB miss faults.
Gabe Black
2009-02-25 10:16:21 -08:00
6ed47e9464
CPU: Implement translateTiming which defers to translateAtomic, and convert the timing simple CPU to use it.
Gabe Black
2009-02-25 10:16:15 -08:00
15940d06b5
SPARC: Adjust a few instructions to not write registers in initiateAcc.
Gabe Black
2009-02-25 10:16:04 -08:00
1b336a8fe7
X86: Make the stupd microop not update registers in initiateAcc.
Gabe Black
2009-02-25 10:15:56 -08:00
5605079b1f
ISA: Replace the translate functions in the TLBs with translateAtomic.
Gabe Black
2009-02-25 10:15:44 -08:00
a1aba01a02
CPU: Get rid of translate... functions from various interface classes.
Gabe Black
2009-02-25 10:15:34 -08:00
f3090e5b70
stats: reorganize how parameters are stored and accessed.
Nathan Binkert
2009-02-23 12:22:19 -08:00
aaf98aaa32
stats: move the limits stuff into the types.hh file
Nathan Binkert
2009-02-23 12:22:18 -08:00
80d5f34da6
stats: get rid of the convoluted 'database' code. Just use the stuff directly and things ought to be more clear
Nathan Binkert
2009-02-23 12:22:17 -08:00
fb74987c52
stats: Try to make the names of things more intuitive. Basically, this means renaming several things called data to info, which is information about the statistics. Things that are named data now are actual data stored for the statistic.
Nathan Binkert
2009-02-23 12:22:15 -08:00
bcb7e70178
stats: clean up the statistics unittest
Nathan Binkert
2009-02-23 12:04:52 -08:00
d940a2b741
stats: fix text printout for distributions
Nathan Binkert
2009-02-23 12:04:50 -08:00
f69ea20fc6
stats: cleanup static stats to make startup work. This is mainly to allow the unit test to run without requiring the standard M5 stats from being initialized (e.g. sim_seconds, sim_ticks, host_seconds)
Nathan Binkert
2009-02-23 12:03:06 -08:00
e8c1c3e72e
X86: Pass whether an access was a read/write/fetch so faults can behave accordingly.
Gabe Black
2009-02-23 00:20:34 -08:00
6c5afe6346
Remove unnecessary building of FreeList/RenameMap in InOrder. Clean-up comments and O3 extensions InOrder Thread Context
Korey Sewell
2009-02-20 11:02:48 -05:00
c41c9cf3a6
events: Make trace events happen at the right priority. Also, while we're at it, remember that priorities are in the Event class and add a disable method to disable tracing.
Nathan Binkert
2009-02-18 10:00:15 -08:00
6cfff91d43
Make etherdump timestamps zero-based. We previously used the actual wall time for the base timestamps, making etherdumps non-deterministic. This fixes that problem and gets rid of the "malformed packet" at the front that we needed to provide the right base timestamp to wireshark/tcpdump.
Steve Reinhardt
2009-02-17 19:24:46 -08:00
5d029ff11e
sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though.
Lisa Hsu
2009-02-16 17:47:39 -05:00
89ea323250
Update stats for new prefetching fixes. Prefetching is not enabled in any of our regressions, so no significant stat values have changed, but zero-valued prefetch stats no longer show up when prefetching is disabled so there are noticable changes in the reference stat files anyway.
Steve Reinhardt
2009-02-16 12:09:45 -05:00
89a7fb0393
Fixes to get prefetching working again. Apparently we broke it with the cache rewrite and never noticed. Thanks to Bao Yungang <baoyungang@gmail.com> for a significant part of these changes (and for inspiring me to work on the rest). Some other overdue cleanup on the prefetch code too.
Steve Reinhardt
2009-02-16 08:56:40 -08:00
6923282fb5
X86: Make the loader recognize 32 bit x86 processes.
Gabe Black
2009-02-15 23:43:39 -08:00
de72083805
SCons: Fix read_command so it can properly deal with command strings
Nathan Binkert
2009-02-15 20:38:49 -08:00
312fbb1b48
scons: clean up the main SConstruct file more. Add some features to read_command so it works a little bit better Clean up the mercurial checks. Filter the user environment and only pick out the useful stuff.
Nathan Binkert
2009-02-11 16:58:51 -08:00
cf4a00ca41
Configs: Add support for the InOrder CPU model
Korey Sewell
2009-02-10 15:49:29 -08:00
973d8b8b13
InOrder: Import new inorder CPU model from MIPS. This model currently only works in MIPS_SE mode, so it will take some effort to clean it up and make it generally useful. Hopefully people are willing to help make that happen!
Korey Sewell
2009-02-10 15:49:29 -08:00
34a5cd8870
ExeTrace: Allow subclasses of the tracer to define their own prefix to dump
Korey Sewell
2009-02-10 15:49:29 -08:00
2d0a66cbc1
CPU: Prepare CPU models for the new in-order CPU model. Some new functions and forward declarations are necessary to make things work
Korey Sewell
2009-02-10 15:49:29 -08:00
20c5ec6e1c
copyright: This file need not have had the more restrictive copyright.
Nathan Binkert
2009-02-09 20:10:15 -08:00
dd6ea8797f
scons: Require SCons version 0.98.1 This allows me to clean things up so we are up to date with respect to deprecated features. There are many features scheduled for permanent failure in scons 2.0 and 0.98.1 provides the most compatability for that. It also paves the way for some nice new features that I will add soon
Nathan Binkert
2009-02-09 20:10:14 -08:00
9e268ae63f
scons: Don't build the intermediate static library unless explicitly requested. This means that similar to libm5_fast.so, you need to explicitly build build/ALPHA_SE/libm5_fast.a if you want it.
Nathan Binkert
2009-02-09 20:10:12 -08:00