X86: Add makeAtomicResponse to the read/write functions of x86 devices.

src/arch/x86/interrupts.cc

@@ -221,6 +221,7 @@ X86ISA::Interrupts::read(PacketPtr pkt)
             "Reading Local APIC register %d at offset %#x as %#x.\n",
             reg, offset, val);
     pkt->setData(((uint8_t *)&val) + (offset & mask(3)));
+    pkt->makeAtomicResponse();
     return latency;
 }
 
@@ -238,6 +239,7 @@ X86ISA::Interrupts::write(PacketPtr pkt)
             "Writing Local APIC register %d at offset %#x as %#x.\n",
             reg, offset, gtoh(val));
     setReg(reg, gtoh(val));
+    pkt->makeAtomicResponse();
     return latency;
 }
 void

src/dev/x86/cmos.cc

@@ -56,6 +56,7 @@ X86ISA::Cmos::read(PacketPtr pkt)
       default:
         panic("Read from undefined CMOS port.\n");
     }
+    pkt->makeAtomicResponse();
     return latency;
 }
 
@@ -74,6 +75,7 @@ X86ISA::Cmos::write(PacketPtr pkt)
       default:
         panic("Write to undefined CMOS port.\n");
     }
+    pkt->makeAtomicResponse();
     return latency;
 }
 

src/dev/x86/i8042.cc

@@ -303,6 +303,7 @@ X86ISA::I8042::read(PacketPtr pkt)
     } else {
         panic("Read from unrecognized port %#x.\n", addr);
     }
+    pkt->makeAtomicResponse();
     return latency;
 }
 
@@ -434,6 +435,7 @@ X86ISA::I8042::write(PacketPtr pkt)
     } else {
         panic("Write to unrecognized port %#x.\n", addr);
     }
+    pkt->makeAtomicResponse();
     return latency;
 }
 

src/dev/x86/i82094aa.cc

@@ -67,6 +67,7 @@ X86ISA::I82094AA::read(PacketPtr pkt)
       default:
         panic("Illegal read from I/O APIC.\n");
     }
+    pkt->makeAtomicResponse();
     return latency;
 }
 
@@ -85,6 +86,7 @@ X86ISA::I82094AA::write(PacketPtr pkt)
       default:
         panic("Illegal write to I/O APIC.\n");
     }
+    pkt->makeAtomicResponse();
     return latency;
 }
 

src/dev/x86/i8237.cc

@@ -63,6 +63,7 @@ X86ISA::I8237::read(PacketPtr pkt)
       default:
         panic("Read from undefined i8237 register %d.\n", offset);
     }
+    pkt->makeAtomicResponse();
     return latency;
 }
 
@@ -120,6 +121,7 @@ X86ISA::I8237::write(PacketPtr pkt)
       default:
         panic("Write to undefined i8254 register.\n");
     }
+    pkt->makeAtomicResponse();
     return latency;
 }
 

src/dev/x86/i8254.cc

@@ -56,6 +56,7 @@ X86ISA::I8254::read(PacketPtr pkt)
     } else {
         panic("Read from undefined i8254 register.\n");
     }
+    pkt->makeAtomicResponse();
     return latency;
 }
 
@@ -71,6 +72,7 @@ X86ISA::I8254::write(PacketPtr pkt)
     } else {
         panic("Write to undefined i8254 register.\n");
     }
+    pkt->makeAtomicResponse();
     return latency;
 }
 

src/dev/x86/i8259.cc

@@ -65,6 +65,7 @@ X86ISA::I8259::read(PacketPtr pkt)
         pkt->set(IMR);
         break;
     }
+    pkt->makeAtomicResponse();
     return latency;
 }
 
@@ -210,6 +211,7 @@ X86ISA::I8259::write(PacketPtr pkt)
         }
         break;
     }
+    pkt->makeAtomicResponse();
     return latency;
 }
 

src/dev/x86/speaker.cc

@@ -47,6 +47,7 @@ X86ISA::Speaker::read(PacketPtr pkt)
             controlVal.speaker ? "on" : "off",
             controlVal.timer ? "on" : "off");
     pkt->set((uint8_t)controlVal);
+    pkt->makeAtomicResponse();
     return latency;
 }
 
@@ -67,6 +68,7 @@ X86ISA::Speaker::write(PacketPtr pkt)
     controlVal.speaker = val.speaker;
     DPRINTF(PcSpeaker, "Writing to speaker device: gate %s, speaker %s.\n",
             controlVal.gate ? "on" : "off", controlVal.speaker ? "on" : "off");
+    pkt->makeAtomicResponse();
     return latency;
 }