Commit Graph

18501 Commits

Author SHA1 Message Date
Alex Richardson
f4e84cd25e cpu-simple: Convert invalid access assertions to panic()
Currently, an access to an invalid address will cause GEM5 to exit with
a `!pkt.isError()` assertion failure. I was seeing this assertion while
running a baremetal RISC-V binary that faulted before the trap vector
had been configured and therefore tried to jump to address zero. With
this change we now print the invalid address and the type of access
(ifetch/load/store/amo) which makes debugging such a problem much easier.
For example, my faulting program now prints the following:
`panic: Instruction fetch ([0:0x4]) failed: BadAddressError [0:3] IF`
I also saw this assertion with a program that was dereferencing a NULL
pointer, which now prints a more helpful message:
`panic: Data fetch ([0x10:0x11]) failed: BadAddressError [10:10]`

Change-Id: Id983b74bf4688711f47308c6c7c15f49662ac495
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55203
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-12 15:34:39 +00:00
Yu-hsin Wang
a8c85b1c40 dev-arm: Mask el2_watchdog in VExpressFastmodel platform
el2_watchdog depends on SystemCounter. However, we have mask
system_counter in the platform. We should also mask the el2_watchdog
accordingly.

Change-Id: I2ed774549272438d654e0573ffe9f482a6659d37
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55306
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-12 08:07:43 +00:00
Yu-hsin Wang
1e0504cf4a fastmodel: Fix cluster build failed
FastModelCortexCluster subclasses don't have `type` property. They don't
need to be specified in sim_objects for generating *Params class.

Change-Id: Ic09e494042e05d68c890f9603b8b78a4a8d815a9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55305
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-12 08:07:33 +00:00
Wing Li
ad7ff8e271 fastmodel: export wake request ports from GIC
Change-Id: I561ef876a4e873501ed2e9775b5bdb59707521a9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54783
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-12 01:48:19 +00:00
Wing Li
301ddefa28 dev: define VectorIntSourcePin type
Change-Id: Ic457593cefb4f82794d3fe4c8c91931c1bf76a63
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55363
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-12 01:48:19 +00:00
Yu-hsin Wang
cd9fc30d92 dev-arm: Add missing sim_objects of VExpressFastmodel
Change-Id: Ic6a9e5f1381c6c6412faa6d19f1448ca0e08b1e7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55304
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-12 01:25:07 +00:00
Bobby R. Bruce
83b703c6b8 stdlib: Remove stdlib README.md
This README.md is outdated and incompleted. User's wishing to learn
about the gem5 stdlib should reference the gem5 website:
https://www.gem5.org/documentation/gem5-stdlib/overview

Issue-on: https://gem5.atlassian.net/browse/GEM5-1019
Change-Id: Ib66bd748d517708833ac591515601f206ce4728a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55323
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-11 22:51:29 +00:00
Gabe Black
df540f0dbf python,util: Pull param struct generation code out of SimObject.
Change-Id: I9f9c3b858a214650f6f07e6127bb316a227982a0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49450
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-11 22:46:43 +00:00
Gabe Black
f42b198371 scons: Stop importing SimObjects into src/SConscript.
Get rid of the actual imports, and all the machinery which supports it.
Everything that had been using them is now handled using helper scripts
and/or the gem5py_m5 utility binary.

Change-Id: I079e50bdabef6d8d199caa80b589319d6419c4ba
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49429
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-11 22:46:43 +00:00
Gabe Black
19c7fe03ac scons: Generate cxx_config/init.cc using a helper script.
Change-Id: Ib0129fc5c2de3977f2dedc1bfec532bbedb2d20e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49428
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-11 22:46:43 +00:00
Gabe Black
ee8ad3f8eb scons: Generate cxx config wrappers using a helper script.
Change-Id: I003426881dc0fd8a338048abbdfa05a606221c39
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49427
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-11 22:46:43 +00:00
Gabe Black
a8d7a41f9f scons,util: Use external helper scripts to build enum hhs and ccs.
Change-Id: Id5cfca9ca7848394baff39c76a4ed0edbec61573
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49426
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-11 22:46:43 +00:00
Matthew Poremba
d6bd91a9fd arch-vega: Implement large ds_read/write instructions
Port large DS read/write instructions from
https://gem5-review.googlesource.com/c/public/gem5/+/48342.

This implements the 96 and 128b ds_read/write instructions in a similar
fashion to the 3 and 4 dword flat_load/store instructions.

These instructions are treated as reads/writes of 3 or 4 dwords, instead
of as a single 96b/128b memory transaction, due to the limitations of
the VecOperand class used in the amdgpu code.

In order to handle treating the memory transaction as multiple dwords,
the patch also adds in new initMemRead/initMemWrite functions for ds
instructions. These are similar to the functions used in flat
instructions for the same purpose.

Change-Id: Iee2de14eb7f32b6654799d53dc97d806288af98f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55344
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-11 16:58:09 +00:00
Matthew Poremba
5a94e73d00 arch-vega: Validate if scalar sources are scalar gprs
Port the fixes for scalar source checks from arch-gcn3 at
https://gem5-review.googlesource.com/c/public/gem5/+/48344.

Scalar sources can either be a general-purpose register or a constant
register that holds a single value.

If we don't check for if the register is a general-purpose register,
it's possible that we get a constant register, which then causes all of
the register mapping code to break, as the constant registers aren't
supposed to be mapped like the general-purpose registers are.

This fix adds an isScalarReg check to the instruction encodings that
were missing it.

Change-Id: I30dd2d082a5a1dcc3075843bcefd325113ed1df6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55343
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-11 16:58:09 +00:00
Yu-hsin Wang
dc48de5e62 configs: Fix parameters change when WalkCache is removed
Change-Id: I3e8d2ae60e64d18462f6782484be500c5c514003
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55303
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-11 02:11:56 +00:00
Yu-hsin Wang
614b608a08 fastmodel: Add an example reset controller for IrisCpu
The example reset controller provides a register interface to config
RVBAR and ability to reset the core.

Change-Id: I088ddde6f44ff9cc5914afb834ec07a8f7f269fa
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54065
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-11 02:11:40 +00:00
Gabe Black
e5187e279a tests: Decrease the iterations of the checkpoint test to 3.
Currently, the test in realview64-simple-atomic-checkpoint.py runs the
default number of checkpoint cycles which is 5. Each of these cycles
takes a long time to run (approximately 5 minutes) which makes this test
take a long time to run to completion. We would get almost all of the
benefit of this test in a fraction of the time if we reduce the number
of iterations down to 3. This still has enough iterations to catch bugs
which would happen in one, a different class of bugs which happen when
checkpointing more than once, and even a third iteration for safety.
Because this test is one of the (if not the) most time consuming test in
the quick tests, reducing its length will significantly improve turn
around time when running all those tests.

That is especially valuable when running the tests multiple times to try
to iterate on a bug, or when sweeping through a series of changes trying
to identify the source of breakages. In cases where we might need to
identify failures which don't effect the end product of a series, ie where
a problem is introduced and then coincidentally fixed in a later change,
this is especially important since every individual change needs to be
checked, not just log(n) of the changes like in a binary search.

Ideally in the future we will also try to figure out why taking and
restoring from checkpoints takes so long so that each iteration of this
test is substantially less expensive. If we do that, we could consider
increasing the iteration count again.

Change-Id: Icfa2a391a4a7457d893f2063fab231d22e572deb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53123
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
2022-01-09 14:10:55 +00:00
Bobby R. Bruce
7c882f7d15 base: Add missing ']' in version ID
Change-Id: I73ac530fde2fff29022aa800f4de925709d9c2f5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55184
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-07 19:06:44 +00:00
Bobby R. Bruce
5e3c64da4e base: Improve ImageFileData's error when file failed to open
When a user accidentally specifies the wrong path to a file, the
following error is received:

```
build/X86/base/loader/image_file_data.cc:111: panic: panic condition fd < 0 occurred: Failed to open file {path}.
```

For new users to gem5 this is confusing, and does not explicitly state
that the root cause of the issue is likely due to the path being
incorrect. Due to use of `panic_if`, this error was followed by a long
and unhelpful backtrace.

This patch expands the error message to state this error is typically
triggered when the specified path is incorrect. It also changes the
`panic_if` to a `fatal_if`. As noted in `src/base/logging.hh`, a
"panic() should be called when something happens that should never ever
happen", while a "fatal() should be called when the simulation cannot
continue due to some condition that is the user's fault". It is clear a
`fatal_if` is more suitable here as it is typically a user error. A
backtrace is not printed for `fatal`, only for `panic`.

Change-Id: I6e0a9bf4efb27ee00a40d77d74fd0dc99f9be4f8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55183
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-07 19:06:44 +00:00
Alistair Delva
791da53cf8 configs: Add support for initrd/initramfs
Allow the user to specify the path to an initrd/initramfs file which
will be loaded in memory after the DTB. The load address for this data
will be passed to Linux via DeviceTree.

Change-Id: I52e12b9b88ab415fe3b318a6359026651667f3c6
Signed-off-by: Alistair Delva <adelva@google.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54186
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-05 23:07:07 +00:00
Alistair Delva
75cd1ff764 dev-arm: Add RealView support for initrd/initramfs
Update the RealView bootloader simulator to set up the initrd_addr. The
load address is derived from the dtb_addr plus the maximum allowable DTB
blob size.

Change-Id: I2eaeb1ade38d24ad8e02230cc99d12873c2f56f9
Signed-off-by: Alistair Delva <adelva@google.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54185
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-05 23:07:07 +00:00
Alistair Delva
cb7799648b arch-arm: Add support for initrd/initramfs
Add initrd_filename and initrd_addr parameters to specify that an
initrd/initramfs should be loaded into memory from a file, just like the
DTB blob. The user must specify the initrd file, and they can specify
the initrd load address as well. However, in practice, it's expected
that the dev/machine backend will derive the initrd load address from
the dtb load address, which is how a bootloader would typically do it.

Change-Id: I6378927c2984b7ccdd1471486dd7803500ef5883
Signed-off-by: Alistair Delva <adelva@google.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54184
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-05 21:38:34 +00:00
Alistair Delva
5af49d03da base: Add support for DT initrd/initramfs
Add a new API function, addBootData(), which allows the ports to specify
the size and load address of the initrd/initramfs via DeviceTree. This
uses the standard chosen nodes for initrd-start/initrd-end.

Update the addBootCmdline() to call addBootData() with no
initrd/initramfs so as to maintain backwards compatibility.

Change-Id: I7b1d5cf2a0b18685eaadf1d881434f3d48c45d8b
Signed-off-by: Alistair Delva <adelva@google.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54183
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-05 21:38:34 +00:00
Eric Ye
f894de5486 scons: Try to fix build dependency bug when generating fastmodels
Bug: 201084562
Change-Id: I33cc9e09b1ce46f80864d75f088a2534949e55e1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55043
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-05 15:29:32 +00:00
Alex Richardson
5ac54aab7e misc: Generate StateMachine debug includes in deterministic order
Since 3454a4a36e the order of the debug/
includes is non-deterministic which can result in unnecessary rebuilds.

Change-Id: I583d2caf70632e08fa59ac85073786270991edbc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54983
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-05 10:15:55 +00:00
Luming Wang
1f155ffd90 arch-riscv,sim-se: Complements the system calls on RISC-V
There are many SE mode system calls that are implemented
in src/sim/syscall_emul.cc or src/sim/syscall_emul.hh.
And they work well under X86 and ARM platforms. However,
they are not supported in se_workload.cc under the RISC-V
platform. This patch adds support for all the system calls
already implemented in syscall_emul.hh/cc to the RISC-V
platform (in arch/riscv/linux/se_workload.cc).

Change-Id: Ia47c3c113767b50412b1c8ade3c1047c894376cf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54803
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2022-01-05 03:25:58 +00:00
Jiasen Huang
ec32f6c6f0 mem-cache: Add switch on/off duplicate entries into RMOB
Change-Id: I394d7c852a439be5315c4755b091c8741e671ea3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55083
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-05 01:18:14 +00:00
Jiasen Huang
66e6e59666 mem-cache: pstAddress should be inserted into PST in STeMS
Change-Id: Ib2c4c5fb0fec32e63947d3ee8dcb5c3d7e2555ab
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55084
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-05 01:14:48 +00:00
Daecheol You
ec58d9d7f3 mem-ruby: Fix message stall time calculation
Three changes below:
1. The m_stall_time was declared as statistics::Average, but
statistics::Average uses AvgStor as storage and this works as per-tick
average stat. In the case of m_stall_time, Scalar should be used to get
the calculation right.

2. The function used to get an enqueue time was changed since the
getTime() returns the time when the message was created.

3. Record the stall time only when the message is really dequeued
from the buffer (stall time is not evaluated when the message is moved
to stall map).

Change-Id: I090d19828b5c43f0843a8b735d3f00f312c436e9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54363
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-03 02:18:41 +00:00
Bobby R. Bruce
ee5b65955e python: Fix get_simstat func for non-Root SimObject case
The `get_simstat` function in `src/python/m5/stats/gem5stats.py` was
returning an error when a non-Root Simobject was passed:

```
AttributeError: object 'PyTrafficGen' has no attribute 'name'
At:
  build/NULL_MESI_Two_Level/python/m5/SimObject.py(1430): __getattr__
  build/NULL_MESI_Two_Level/python/m5/stats/gem5stats.py(279): get_simstat
```

The issue was an assumption that SimObjects have a field `name`. They
do not. To get a SimObject's name the `get_name()` function must be
used. This patch fixes this issue.

In addition to this fix, the documentation in this function has been
improved to state more clearly what can be passed  and what shall be
returned. Previously it was somewhat unclear.

Change-Id: I33538120015280bb6260ccf8eba6b75ff43d280e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54943
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-30 23:15:24 +00:00
Bobby R. Bruce
6a44472b1c mem: Add 'controller()' function to NVMInterface.py
As noted here: https://gem5.atlassian.net/browse/GEM5-1133,
NVMInterface.py does not have a `controller()` function, which is used
by `configs/common/MemConfig.py` to obtain a memory controller for a
specific memory type selected. This patch adds a `controller()`
function to `NVNInterface.py` to avoid the reported error.

It should be noted that we do not enforce a rule that a memory type
must include a `controller()` function. `se.py`, and other scrips
that use `configs/common/MemConfigs.py`, should not rely on this
false assumption.

Change-Id: Ieba62f803d3b9f9c5c3c863d5a8c4ca16c5e5e82
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54923
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-30 03:03:15 +00:00
Bobby R. Bruce
5e6a561a3f misc: Revert v21.2 specific commits for develop
These changes were made to the release staging branch for the v21.2
release. This commit reverts them for the develop branch.

Change-Id: I9f02470d00d5034a0797f32d4c1fe0e7055860a6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54904
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-28 21:30:21 +00:00
Gabe Black
dda149ecf8 scons: Add a --linker option.
There is currently a "--gold-linker" option, which tells SCons to use
the gold linker. This puts the gold linker in a special position where
it has its own command line option, and makes it impossible to
explicitly select any other linker.

This change adds a --linker option which can be set to "bfd" (the
default gnu linker), "gold" (the gnu gold linker), or "lld" which is the
clang linker. If none is specified, SCons will let the compiler fall
back to whatever its default is.

The --gold-linker option is modified so that it just sets the --linker
option for you. Because of how SCons handles adding command line
options, there isn't a good way to complain if both it and --linker is
used, nor is there a good way to warn that the user is using a
deprecated command line option. A warning is in the help text for that
option now, though.

If the gold linker is selected, this change also sets the --threads
option, and sets the --thread-count option. This tells the gold linker
to run multi-threaded to speed up linking. Apparently the gold linker
must have been built with an option that enables threading for these
options to have any effect. If threads and LTO are both enabled, the
gold linker segfaults. To avoid that problem, we don't add --threads if
LTO has been enabled.

This change also enables a new configuration, where lld, the clang
linker, can be used with gcc. Unfortunately the format of LTO
information gcc/g++ generates is not compatible with lld, and so if you
set the linker to lld and enable LTO, you'll probably get errors like
not being able to find the symbol "main".

This change also allows you to select the default gnu linker ("bfd")
when using clang, although it's not clear why you would want to do that.

Change-Id: Ib37030431527f5d0bc626e9594b2e1142df889be
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49003
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-12-28 05:28:32 +00:00
Bobby R. Bruce
065a7dbf1b misc: Merge branch release-staging-v21-2 into develop
Change-Id: I8200ac51c20117f63b51d555fa2f12e5dd35f22e
2021-12-26 23:59:41 -08:00
Bobby R. Bruce
515c89b860 util-docker: Update how rocBLAS is built in gcn-gpu Dockerfile
rocBLAS builds for all targets by default, but it requires we set the
HCC_AMDGPU_TARGET env variable to all the targets we want to build for.

This change explicitly sets all the gfx versions we intend to support in
gem5, and removes the extraneous "-a all" from the install command.

Additionally, doing this allowed for DNNMark to run on gfx902.

Change-Id: Id1a00433beaa23f6935c12073d5bddc38431886b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54623
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-27 06:43:52 +00:00
Jason Lowe-Power
f554b1a7b5 misc: Add release notes for v21.2
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Change-Id: Ia92440b3b2bcd777b75b0c65ab65252b27734ebb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54603
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2021-12-27 05:58:33 +00:00
Bobby R. Bruce
da5efee4fd ext,misc: Update ext/sst/README.md for v21.2 release
Change-Id: I2cd982c819074962182da43754399852f9e72174
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54703
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-27 05:58:04 +00:00
Bobby R. Bruce
b2ffa27f44 tests: Increase Kokoro test timeout to 7 hours
Change-Id: I5a334124cc14d7db3a6227981ed46ae0cc80e558
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54824
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-27 05:58:04 +00:00
Bobby R. Bruce
db921c890e scons: Fix 'CheckLinkFlag' so '-Werror' is not enabled
A small error in 'CheckLinkFlag' was resulting in `-Werror` being set
as a CXXFLAG after the function was run. This patch fixes this.

Change-Id: I786f81a4f94be0356573eb6d4673d04ee5aa844d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54863
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-27 05:58:04 +00:00
Jiasen Huang
398d4f9d07 mem-cache: Init lastTriggerCounter for STeMS Prefetcher
Change-Id: I43a0093e6d35a39799d724e7dee15c95dbc26343
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54643
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-23 01:40:09 +00:00
Cui Jin
2194aea053 arch-riscv: rvc instruction is mistaken as branch
Fetch in O3CPU mistakes the normal non-branching compressed
instructions, and regards it as a branch. This issue interrupts
the consecutive instruction stream, thus affecting performance
of cpu front-end.
This fix sets the compressed for PCState during decoding.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1137

Change-Id: I7607d563bba8a08869e104877fc3c11c94cbe904
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54644
Reviewed-by: Jin Cui <cuijinbird@gmail.com>
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-22 23:51:50 +00:00
Jiasen Huang
7910926631 mem-cache: Set prefetch bit if the blk comes from Prefetch only.
Original logic setting prefetch inside serviceMSHRTargets
did not exclude the blks that both came from CORE and Prefetch

Change-Id: Iab56b9266eb64baf972b160774aca0823faea458
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54364
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-22 01:02:22 +00:00
Bobby R. Bruce
594145849c scons: Remove -Werror for the gem5 v21.2 release
While gem5 compiles on our supported compilers, removing the -Werror
flag on the stable branch ensures that, as new compilers are released
with stricter warnings, gem5 remains compilable.

Change-Id: I05989356997bc7f6606c43944d15da6c3958a3f5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54463
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-21 22:29:07 +00:00
Bobby R. Bruce
5cf00e5055 configs,tests: Update refs to deprecated 'x86-ubuntu-img'
This resource has been deprecated in favor of 'x86-ubuntu-18.04-img'. In
practise, these are the same resource (i.e., the same disk image), but
we deprecate 'x86-ubuntu-img' as 'x86-ubuntu-18.04-img' is more explicit
on what the disk image contains. Going forward we may want different
disk image resources with different Ubuntu versions, and we want it to
be clear what the user is retrieving.

Change-Id: I06b08e6b65cf431067ffda35ebd10d419068d073
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54583
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-21 22:28:42 +00:00
Bobby R. Bruce
c999905772 misc: Hardcode docker pulls to v21-2 versions
Change-Id: I404f2c881a00645302c0af5f22e8a59548426cac
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54470
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-21 22:28:42 +00:00
Bobby R. Bruce
af07c64577 tests: Update the weekly and nightly tests to use v21.2
Note: There is an annoying work-around here for tests where we obtain
the gem5 resources repo directly to compile and run tests.

Change-Id: If8e7d3e7fd8dea9d0e1653e73360c295ad43e1ac
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54469
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-21 22:28:42 +00:00
Bobby R. Bruce
eeccb4ad88 util: Fix gcn-gpu docker download to v21-2
Change-Id: Ibb64d080dc72c7208c97a5272d443a17122ab60b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54468
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-21 22:28:42 +00:00
Bobby R. Bruce
798d2ed15b ext,tests: Update the testlib download URL for v21.2
Change-Id: I36bb8208485536482f30ef77f6e509379481b5ee
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54467
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-21 22:28:42 +00:00
Bobby R. Bruce
b959fbac7b stdlib: Update the stdlib resource downloader for versions
The 'resources.json' file in gem5 resources is used to lookup resources.
The stdlib resource downloader was hardcoded to the 'resources.json'
stored in the gem5 resources stable branch. This change allows the gem5
downloader to obtain the specific resources.json.

Change-Id: Ie119ed9326b359055bf5bc347ca89336a5cc2e5d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54466
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-21 22:28:42 +00:00
Bobby R. Bruce
33a0d30a1a tests: Update the cpu_tests download URL
This new URL puts the binaries in the same directory structure as the
other test programs. This is part of a minor re-arrange of the Google
Cloud bucket.

Change-Id: Ibbd1385adf96bc63b54b717b5385c77a6b0c4dbb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54465
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-21 22:28:42 +00:00