fastmodel: export wake request ports from GIC

Change-Id: I561ef876a4e873501ed2e9775b5bdb59707521a9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54783
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Wing Li
2021-12-22 17:28:03 -08:00
parent 301ddefa28
commit ad7ff8e271
5 changed files with 34 additions and 1 deletions

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@@ -41,6 +41,7 @@ from m5.SimObject import SimObject
from m5.objects.FastModel import AmbaInitiatorSocket, AmbaTargetSocket
from m5.objects.Gic import BaseGic
from m5.objects.IntPin import VectorIntSourcePin
from m5.objects.SystemC import SystemC_ScModule
GICV3_COMMS_TARGET_ROLE = 'GICV3 COMMS TARGET'
@@ -473,6 +474,8 @@ class FastModelGIC(BaseGic):
redistributor = VectorGicv3CommsInitiatorSocket(
'GIC communication initiator')
wake_request = VectorIntSourcePin('GIC wake request initiator')
# Used for DTB autogeneration
_state = FdtState(addr_cells=2, size_cells=2, interrupt_cells=3)

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@@ -53,6 +53,9 @@ component GIC
// For the CPU interface.
gic.redistributor_m => self.redistributor;
// Outgoing wake requests.
gic.wake_request => self.wake_request;
// Internal ports for PPI and SPI programmatic access.
self.ppi_0 => gic.ppi_in_0;
self.ppi_1 => gic.ppi_in_1;
@@ -324,6 +327,8 @@ component GIC
master port<GICv3Comms> redistributor[256];
master port<Signal> wake_request[256];
#define setPPI(C) \
case C: ppi_##C[num].setValue(state); \
break

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@@ -16,6 +16,7 @@ config "gcc"
SIMGEN_COMMAND_LINE = "--num-comps-file 50";
TARGET_MAXVIEW = "0";
TARGET_SYSTEMC = "1";
TARGET_SYSTEMC_AUTO = "1";
}
files
{

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@@ -77,6 +77,12 @@ SCGIC::SCGIC(const SCFastModelGICParams &params,
{
signalInterrupt.bind(signal_interrupt);
for (int i = 0; i < wake_request.size(); i++) {
wakeRequests.emplace_back(
new SignalReceiver(csprintf("%s.wakerequest[%d]", name(), i)));
wake_request[i].bind(wakeRequests[i]->signal_in);
}
set_parameter("gic.enabled", params.enabled);
set_parameter("gic.has-gicv3", params.has_gicv3);
set_parameter("gic.has-gicv4.1", params.has_gicv4_1);
@@ -306,7 +312,18 @@ GIC::GIC(const FastModelGICParams &params) :
ambaS(params.sc_gic->amba_s, params.name + ".amba_s", -1),
redistributors(params.port_redistributor_connection_count),
scGIC(params.sc_gic)
{}
{
for (int i = 0; i < params.port_wake_request_connection_count; i++) {
wakeRequestPorts.emplace_back(new IntSourcePin<GIC>(
csprintf("%s.wakerequestport[%d]", name(), i), i, this));
auto handler = [this, i](bool status)
{
auto &port = wakeRequestPorts[i];
status ? port->raise() : port->lower();
};
scGIC->wakeRequests[i]->onChange(handler);
}
}
Port &
GIC::getPort(const std::string &if_name, PortID idx)
@@ -323,6 +340,8 @@ GIC::getPort(const std::string &if_name, PortID idx)
name(), idx), idx));
}
return *ptr;
} else if (if_name == "wake_request") {
return *wakeRequestPorts.at(idx);
} else {
return BaseGic::getPort(if_name, idx);
}

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@@ -36,7 +36,9 @@
#include <memory>
#include "arch/arm/fastmodel/amba_ports.hh"
#include "arch/arm/fastmodel/common/signal_receiver.hh"
#include "dev/arm/base_gic.hh"
#include "dev/intpin.hh"
#include "params/FastModelGIC.hh"
#include "params/SCFastModelGIC.hh"
#include "scx_evs_GIC.h"
@@ -92,6 +94,8 @@ class SCGIC : public scx_evs_GIC
SignalInterruptInitiatorSocket signalInterrupt;
std::vector<std::unique_ptr<SignalReceiver>> wakeRequests;
void before_end_of_elaboration() override;
void
@@ -118,6 +122,7 @@ class GIC : public BaseGic
AmbaInitiator ambaM;
AmbaTarget ambaS;
std::vector<std::unique_ptr<TlmGicInitiator>> redistributors;
std::vector<std::unique_ptr<IntSourcePin<GIC>>> wakeRequestPorts;
SCGIC *scGIC;