Commit Graph

19947 Commits

Author SHA1 Message Date
Wei-Han Chen
c98d0d2f93 base: Add missing headers in extensible.hh
Add missing headers <cassert> and <type_traits> in extensible.hh

Change-Id: I01e49c62619383ea4f7da668ceaefe4a41418cd8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69480
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
2023-04-08 01:21:48 +00:00
Gabe Black
179dfe521b util: Make m5term able to connect to unix domain sockets.
To connect to a unix domain socket, it must start with a non-digit
character to avoid being confused with a TCP port. If it starts with an
"@" character, then it is treated as an abstract socket.

Change-Id: I3a71eb8ef80018546f3bbf9d781770bd37ecec09
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69167
Reviewed-by: Jui-min Lee <fcrh@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-06 01:13:04 +00:00
Alex Richardson
5e096f5b5d scons: allow building without duplicating source files
This adds a new scons flag --no-duplicate-sources to build without
linking source files to the build directory.

I find this very helpful when using CLion, since I can now generate a
compilation database using
`bear scons build/ALL/gem5.debug --no-duplicate-sources` and CLion will
now correctly semantically analyze all the files inside src/.
It also ensures that clicking on a build warning/error now opens the
real source file rather than a symlink.

This is not enabled by default since it's possible that certain use
cases are not working correctly, but the basic testing I've done so
far appears to work just fine.

It appears that with this change the `<root>/src` directory is no longer
added to `PYTHONPATH` when running `tests/main.py`, so this change
depends on https://gem5-review.git.corp.google.com/c/public/gem5/+/68757

Change-Id: Iddc9bf9c8211e68e5432c0a07f5c95f427c1ca16
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68518
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2023-04-05 22:00:07 +00:00
Gabe Black
c00e3b2570 base: Abstract the AF_INET-ness out of ListenSocket.
Put them into a subclass called ListenSocketInet.

Change-Id: I035621463a7f799c1d36a500ed933dc056238e5e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69163
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jui-min Lee <fcrh@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2023-04-05 06:58:04 +00:00
Matt Sinclair
ea623eb6e5 mem-ruby: fix whitespacing errors in RubySystem
These errors cause other commits to fail pre-commit

Change-Id: I379d2d7c73f88d0bb35de5aaa7d8cb70a83ee1dd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69397
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2023-04-05 04:19:50 +00:00
HJikram
f7f5b68202 stdlib: Small fix in stdlib spec2006 script
The call to processor switch from KVM to TIMING was
removed in an earlier commit. This change fixes that.
Also, get_roi_ticks() doesn't work because spec2006
does not have work_begin and work_exit annotations.
This change uses get_tick_stopwatch() to calculate
the roi ticks.

Change-Id: I55efe28ebd686cb4e6c88a528533127fb73c88ed
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69357
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-04 11:25:22 +00:00
Bobby R. Bruce
59ea30913f arch-sparc: Rewrite unused array in tgt_stat64 for mac
On Mac (tested on Mac Mini M2 Pro) the src/arch/sparc/linux/linux.hh was
uncompilable due to `int64_t __unused[3]` not working with the Mac
GLIB's `__unused` definition. This was therefore rewritten.

Change-Id: I8094a54ccf8dedb8e63ef05770e48eef7012262c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68838
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Melissa Jost <mkjost@ucdavis.edu>
2023-04-04 00:06:03 +00:00
Vishnu Ramadas
8b7e55339a dev-amdgpu: Add GART translations to GPUFS checkpoint
Earlier, the GART entries were not being checkpointed. Therefore, during
checkpoint restore, certain SDMA instances were initialized with
incorrect addresses that led to incorrect behavior. This commit
checkpoints the GART entries and restores them.

Change-Id: I5464a39ed431e482ff7519b89bd5b664fd992ccf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69299
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-03 22:29:10 +00:00
Vishnu Ramadas
65e0bd6eb4 dev-amdgpu: Added PM4MapQueues to GPUFS checkpoint
The GPUFS checkpoint restoration mechanism expects to find a
PM4MapQueues packet in the checkpoint. Since this was not being
checkpointed, the restore phase retrieved a null packet which led to a
segmentation fault. This commit adds PM4MapQueues to the checkpoint and
restores it when deserializing the checkpoint

Change-Id: Ib74a9f36fe89d740a74f94314ada41ecc363abe9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69298
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
2023-04-03 22:28:57 +00:00
Melissa Jost
ee2be9cffe tests: Update nightly SystemC test
The SystemC test requires gem5 to be built with the minimum
dependencies image, and it was also updated to properly use
se.py since it has now been deprecated.

Change-Id: I1223afd70f105073d2cd4a2a78135f1f935c06ec
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69337
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-30 21:01:42 +00:00
Bobby R. Bruce
5361da58be tests: Fix the nightly SST and SystemC tests
These tests were only returning the exit-code of the last command in the
bash script, which would silence failures in commands prior to that.
This patch fixes this. Now these tests will return a non-zero exit code
for any failure when executing these bash scripts.

Change-Id: I2195bbd0357f0b38c192ab5f9e8ad68101786247
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68677
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-30 21:01:42 +00:00
Melissa Jost
1ff3ea2a09 tests: Fix failing SST and SystemC nightly tests
There was a bug with the SST and SystemC tests where they wouldn't
compile due to a missing path for the gdbremote/signals.hh
header, and this change includes that so they run properly.

Change-Id: I9ff0404e327358fe2d1b77388bbcc1f807136ebe
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67817
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-30 21:01:42 +00:00
Marco Chen
f4d8fe2595 arch-arm: This commit fix incorrect ARM isa implementation
When running 500.perlbench_r of specint 2017, the system will raise an
 assertion error. For function bits of src/base/bitfield.hh (line 76),
 the parameter First is smaller than Last. This is caused by incorrect
 implementation of uqrshl in src/arch/arm/isa/insts/neon64.isa

When shiftAmt equals 0, which mean uqrshl is actually not shift the
 value stored in register. sizeof(Element) * 8 - 1 will be smaller than
 sizeof(Element) * 8 - shiftAmt, thus will raise the assertion error.

This commit added this special condition.

No Jira issue has been submitted to report this error

Change-Id: I4162ac3ddb62f162619db400f214f33209b23c19
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69318
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2023-03-29 15:22:01 +00:00
Bobby R. Bruce
91637af3dc tests: Add DRAMSys compilation and scripts to Weekly tests
Change-Id: I4353843e4e5f6db6f6d576dec4a34c3d403da1cc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69200
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2023-03-29 08:19:08 +00:00
803f9f5aa7 stdlib,configs: Add DRAMSys to the gem5 standard library
Add DRAMSys as a new AbstractMemorySystem to the gem5 stdlib.
Also, provide convenient subclasses with predefined DRAMSys
configurations.

Add two new stdlib examples:
    - dramsys-traffic.py: Demonstrates the usage of DRAMSys
      using the stdlib TrafficGenerators
    - arm-hello-dramsys.py: A variant of the arm-hello.py
      script that uses DRAMSys as it's memory.

These DRAMSys memory components are only compiled into the standard
library if DRAMSys is not compiled into gem5.

Change-Id: I9db87c41fbd9c28bc44e9d6bde13fc225dc16be9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62914
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2023-03-29 08:19:08 +00:00
ad8c4f1bf4 stdlib: Use get_mem_ports in incorporate caches
Make use of get_mem_ports() method of the AbstractMemorySystem
interface when incorporating caches to prevent the usage of the
hard-coded memory port name "port" as some memory controllers do
not have a port with this exact name.

Change-Id: Ic7480166b257c6d356027234758b65b0a97995e3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68482
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2023-03-29 08:19:08 +00:00
8d2831725a configs: Add DRAMSys config example
Add an example configuration for gem5 that runs the
DRAMSys simulator with a TrafficGenerator initiator.

Change-Id: If90f49fcc05b73905b2f9dc8b7aadfdbd866340a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62913
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-29 08:19:08 +00:00
bc6133e6a1 mem: Add DRAMSys wrapper as a memory object
Add a DRAMSys wrapper to the gem5 memory source that
instantiates the DRAMSys simulator.
Another DRAMSys SimObject implements the AbstractMemory
interface and exposes the tlm target socket.

Change-Id: I8a95e729905e0924453043e5e7744df7a7ce4548
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62912
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2023-03-29 08:19:08 +00:00
ddcf452b1b ext: Add DRAMSys integration instructions
Add instructions to add the DRAMSys memory simulator
to gem5 in the ext/ directory.
The provided SConscript file compiles DRAMSys.

Change-Id: If5c723db61a3151c9155190f968c66927d7bfaa3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62911
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2023-03-29 08:19:08 +00:00
Gabe Black
d03bc9d33c base,cpu,dev: Add a level of indirection for ListenSockets.
This makes room for there to be different implementations for different
types of sockets.

Change-Id: I8c959e2c3400caec8242e693e11330e072bc2c5f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69162
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2023-03-29 07:27:43 +00:00
Gabe Black
7c614d225b base: Make ListenSocket::listen(int port) protected.
Stop making the old API available.

Change-Id: I70752d081cb572a8ae5bf396d2ea43ecc7be1e9c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69161
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-29 03:05:06 +00:00
Gabe Black
67fb75d659 base,cpu,dev,sim: Pull common logic into ListenSocket::listen().
Create a version of listen() which handles common logic internally,
including scanning for an available port number, and notifying what
port was chosen.

The port is managed internal to ListenSocket, so that the logic
interacting with it doesn't need to manually manage a port number, and
hence a port number does not need to exist for non AF_INET sockets.

Change-Id: Ie371eccc4d0da5e7b90714508e4cb72fb0091875
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69160
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2023-03-29 03:05:06 +00:00
Xuan Hu
461520d0ab ext: Update softfloat to 3d full version
* Add all softfloat source files without any change.
* Remove useless file softfloat.mk.in, since gem5 use Scons.
* Add `use_fast_int64` in SConscript to distinguish src of two strategies for data
  larger than 64 bits.
  * The SoftFloat library uses two strategies to handle data larger than 64bit. One is
    spliting data into `fast_int64`, and the other is using pointer. Two strategies
    are distinguished by macro `SOFTFLOAT_FAST_INT64`. But not all "*.c" files are
    guarded by this macro, which leads to including useless files in compiling progress
    and compiling error. `use_fast_int64` used in SConscript can exclude unnecessary
    files.

Change-Id: I7cec10412c00a35c247299cd92d83cdee9066410
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66552
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2023-03-28 10:47:18 +00:00
Bobby R. Bruce
c68fac2cfc tests: Add "run threads" optional parameter to weekly.sh
Adds a third argument to the weekly.sh script, allowing for a different
number of "run threads" (maximum number of tests that can be run at
once) and "compile threads" (threads to allocate to the running of
gem5). This is useful for cases where a high number of compilation
threads is wanted (e.g., 50 or so), but that number of tests running at
once is undesirable.

Change-Id: Ifd67c5826c6f3602db1546a8a48e615cb03ba820
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69241
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-28 06:46:44 +00:00
Bobby R. Bruce
c8abd97584 tests: Disable the looppoint checkpoint tests
The Looppoint checkpoint  feature is still under-development.
These tests are stalling indefinitely and causing the Weekly tests to
timeout. They are therefore disabled until looppoint functionality is
complete and this bug is resolved.

Change-Id: I2c16abdaec639120c0ba349d90f5cc2fe747f8e6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69240
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-28 06:46:44 +00:00
Bobby R. Bruce
4ce826b244 tests: Check if ARM/gem5.opt not built in test_hdf5.py
This test was failing to load as ARM/gem5.opt is not built when this
test is pased during the Weekly tests. This bug is highlighed here:
https://gem5.atlassian.net/browse/GEM5-1073.

Comments have been added explaining this issue and the test not fails
more quitely. It, however, is not run.

Change-Id: I1f26f541a15438f6124a7541c01d44f70647762a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69239
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2023-03-28 06:46:44 +00:00
Bobby R. Bruce
3f59eed523 tests: Fix the Weekly arm-boot-tests
These tests were broken due to an incorrect 'valid_isas' flag. This
patch fixes this error.

Change-Id: I941deb209151dd94ca64f2741229398f13153c50
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69238
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2023-03-28 06:46:44 +00:00
Bobby R. Bruce
68fed7b5e1 tests: Fix Replacement Policy Tests
The script run by 'test_replacement_policies.py' was named
'run_replacement_policy_test.py'. This caused the TestLib framework to
fail as any file with the string "test" in it was attempted to parse as
a test. As this is a gem5 Python config file, this caused a failure.

To fix this the file was renamed 'run_replacement_policy.py'.

Change-Id: I6f0a09e4f5056a9c94e258c9aea26bf277206733
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69237
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
2023-03-28 06:46:44 +00:00
Bobby R. Bruce
8dfaec0e10 util-docker: Update systemc docker image to use 22.04
Updates the Dockerfile, and therefore the Docker image, to use Ubuntu
22.04 instead of Ubuntu 20.04.

Change-Id: I0969205159d47ece9b0b6c0452ce0f3420f32e4c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69317
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2023-03-28 01:21:52 +00:00
Ayaz Akram
024a907cbb stdlib: Small fix in mesi three level component
This change ensures that if cache_line_size is not
an integer type, we don't incorrectly raise the
exception of cache size not equal to 2^bits.

Change-Id: I5a06cdac820283feb54f23d805fd87490fae1c3b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69297
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2023-03-27 20:45:00 +00:00
Matt Sinclair
2112eea414 tests: add GPU Ruby Random tester with WB L2 caches
The current GPU Ruby Random tester tests only test for WT L2 caches,
meaning that some transitions (specific to WB caches) are never
tested.  To help ensure better coverage, this commit adds a separate
test that tests WB GPU L2 caches to the per-checkin and nightly
regressions.

Change-Id: I539ece3b825b9a38630027d947dc11ebef588752
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69258
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2023-03-24 06:21:31 +00:00
Gabe Black
db1a5a367d base,cpu,dev: Simplify ListenSocket::listen().
Remove the "reuse" parameter which default to true and was always
also explicitly set to true. Tidy up the code itself slightly, mostly
by using "panic_if" to remove some nesting.

Change-Id: Ie23971aabf2fe4252d27f1887468360722a72379
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69159
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-22 09:19:44 +00:00
Yu-hsin Wang
daaccaa9ae fastmodel: skip vector registers update in remote gdb
iris::ThreadContext doesn't implement the write interface for vector
registers. Skip that part in fastmodel remote_gdb to make updating
common registers work at least.

Change-Id: Ifa071f5dff4bdeee7361ae824b4b76e0b2805460
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69177
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-22 08:33:30 +00:00
Gabe Black
2e1d24d048 base,dev: Simplify the ListenSocket::accept method.
Remove the nodelay option which is always set to the same thing, and
simplify the logic of the method itself.

Change-Id: I78cd91f99cbaec9abddedbc7dcddc563daedb81f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69158
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
2023-03-22 08:27:23 +00:00
Alvaro Moreno
79cfef2650 stdlib: Define env variables in SE workload
Implements a parameter in SE binary workload class
to define env variables inside each process.

Change-Id: I943a560043eff423989297cb2afa386a90df6791
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68937
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-22 07:31:27 +00:00
Matt Sinclair
a030ff2745 mem-ruby: fix atomic deadlock with WB GPU L2 caches
By default the GPU VIPER coherence protocol uses a WT L2 cache.
However it has support for using WB caches (although this is not
tested currently).  When using a WB L2 cache for the GPU, this
results in deadlocks with atomics.

Specifically, when an atomic reaches the L2 and the line is
currently in M or W, the line must be written back before the atomic
can be performed.  However, the current support has two issues:

a) it never performs the atomic operation -- while VIPER current
assumes all atomics are system scope atomics and thus cannot be
performed at the L2 and this transition requires the dirty line be
written back before performing the atomic, the transition never
performs the atomic nor does the response path handle it.
b) putting the atomic action right after the write back is not
safe because we need to ensure the requests are ordered when they
reach memory -- thus we have to wait until the write back is
acknowledged before it's safe to send/perform the atomic.

To fix this, this change modifies the transition in question to
put the atomic on the stalled requests buffer, which the WBAck will
check when it returns to the L2 (and thus perform the atomic, which
will result in the atomic being sent on to the directory).

This fix has been tested and verified with both the per-checkin and
nightly GPU Ruby Random tester tests (with a WB L2 cache).

Change-Id: I9a43fd985dc71297521f4b05c47288d92c314ac7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68978
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-22 04:00:38 +00:00
Matt Sinclair
92d920f994 mem-ruby: fix load deadlock with WB GPU L2 caches
By default the GPU VIPER coherence protocol uses a WT L2 cache.
However it has support for using WB caches (although this is not
tested currently).  When using a WB L2 cache for the GPU, this
results in deadlocks with loads.

Specifically, when a load reaches the L2 and the line is currently
in the W state, that line must be written back before the load can
be performed.  However, the current transition for this in the L2
did not attempt to retry the load when the WB completes, resulting
in a deadlock.  This deadlock can be replicated by running the GPU
Ruby random tester as is with a WB L2 cache instead of a WT L2
cache.

To fix this, this change modifies the transition in question to
put the load on the stalled requests buffer, which the WBAck will
check when it returns to the L2 (and thus perform the load).

This fix has been tested and verified with both the per-checkin and
nightly GPU Ruby Random tester tests (with a WB L2 cache).

Change-Id: Ieec4f61a3070cf9976b8c3ef0cdbd0cc5a1443c6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68977
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-22 04:00:38 +00:00
Gabe Black
fb4eb86711 base: Flip the default for ListenSocket::accept(bool nodelay).
This option was almost always overridden from false to true anyway,
except in one place (in the ethertap device) which was likely just by
accident.

This will give external users a chance to remove the option without
changing behavior, so that the option can be removed entirely in a
later change.

Change-Id: I77add40b8131b91997b2aecbfff6c7de0ee9ead9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69157
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
2023-03-22 03:20:43 +00:00
Roger Chang
2c488e07df arch-riscv: Add pmp index checking
Check the index is within the bounds of PMP table before updating the
address and config

Change-Id: Ie938b3c2a61eca9527192c0452d1db9522f07af9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69117
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
2023-03-22 01:31:17 +00:00
Giacomo Travaglini
069688df35 misc: Update the .git-blame-ignore-revs to ignore flynt commit
This [1] is just a cosmetic change which shouldn't affect functionalities.
We might want to ignore it when running git blame

[1]: https://gem5-review.googlesource.com/c/public/gem5/+/68957

Change-Id: I96e3308beb0bc6ad9638df137341bf611d4db5b1
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69037
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2023-03-21 06:54:40 +00:00
Giacomo Travaglini
7b39a7f14e misc: Rename DEBUG macro into GEM5_DEBUG
The DEBUG macro is not part of any compiler standards (differently from
NDEBUG, which elides assertions).

It is only meant to differentiate gem5.debug from .fast and .opt builds.
gem5 developers have used it to insert helper code that is supposed to
aid the debugging process in case anything goes wrong.

This generic name is likely to clash with other libraries linked with
gem5.  This is the case of DRAMSim as an example.

Rather than using undef tricks, we just inject a GEM5_DEBUG macro
for gem5.debug builds.

Change-Id: Ie913ca30da615bd0075277a260bbdbc397b7ec87
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69079
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2023-03-21 06:53:55 +00:00
Giacomo Travaglini
e4a9864458 sim: Remove unused SimObject::debugObjectBreak
The static method is only present in gem5.debug builds and
it doesn't seem to do anything else than setting up a boolean
flag. I was not able to understand from git history which
was the purpose of it but I am confident it's not currently
used.

It was maybe meant to work with the --debug-break option, which
sends a SIGRAP to the current PID in order to halt a GDB
session at a specific time. Maybe the idea was to halt only
when executing a SimObject method?

Change-Id: Ic21e8f55b5e35480c2bc617c24e1352c37516e8f
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69078
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2023-03-21 06:53:55 +00:00
Giacomo Travaglini
2bbd2b9596 base: Remove unnecessary DEBUG guard
There is no performance improvement on guarding a cprint
before a panic. We should just print as many info as possible
anytime we encounter a failure

Change-Id: I3ee9fb2c3b8a8f23bdf6173bb2a010020f2b2572
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69077
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-21 06:53:55 +00:00
Yu-hsin Wang
f6ee1f2724 fastmodel: delay the breakpoint event handle to simulation stop
The fastmodel simulation would be paused when it hits a breakpoint.
However, the order of stop event happens after the breakpoint event. If
we handle the breakpoint logic in the breakpoint event, it may cause
somehow status unsynchronized. To make the behavior stable, we delay the
breakpoint handle until the simulation stop event called.

Change-Id: I0083561f561af71370ccaa066220b72ed7831b78
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68697
Reviewed-by: Earl Ou <shunhsingou@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-20 02:45:20 +00:00
Giacomo Travaglini
e73655d038 misc: Use python f-strings for string formatting
This patch has been generated by applying flynt to the
gem5 repo (ext has been excluded)

JIRA: https://gem5.atlassian.net/browse/GEM5-831

Change-Id: I0935db6223d5426b99515959bde78e374cbadb04
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68957
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2023-03-16 09:05:29 +00:00
Bobby R. Bruce
07fca546e6 ext: Update Pybind to Version 2.10.3
Updating Pybind11 is necessary for gem5 to compile correctly with
Python 3.11. As of March 9th 2023, 2.10.3 is the latest version of
Pybind11.

Change-Id: I32c68c507770040d3fac2de442d88a8f46b48896
Issue-on: https://gem5.atlassian.net/browse/GEM5-1295
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68818
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2023-03-15 21:03:41 +00:00
Bobby R. Bruce
b305019ac4 python: Replace 'getargspec' with 'signature' in SimObject.py
In Python 3.11 'inspect.getargspec' has been removed. It has been
marked for deprecation since 3.5. The SimObject.py class has therefore
been rewritten to use 'inspect.signature' instead.

Change-Id: I9efd831e05e0b1619f366ffe722abb0a072fd519
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68817
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-15 21:03:41 +00:00
Roger Chang
fa0795ff5b arch-riscv: Add new misa bit union
The new misa bit union type can help get and set misa CSR more
clearily

Change-Id: Id48b140968a0e8021b09782815aa612b409ac75b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68917
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2023-03-15 01:18:09 +00:00
Razeza
a589d7b569 arch-x86: Add instructions from SSE4.1 set.
The following instructions were implemented: PHMINPOSUW, ROUNDSS, ROUNDSD, EXTRACTPS, INSERTPS, PMULLD, PMULDQ,
PCMPGTQ, PMINUW, PMINUD, PMINSB, MINSD, PMAXUW, PMAXUD, PMAXSB, PMAXSD, PEXTRB, PEXTRW for memory, PEXTRD, PEXTRQ,
PINSRB, PINSRD, PINSRQ, PACKUSDW, PBLENDW, BLENDPS, BLENDPD, BLENDVPD, BLENDVPS, PBLENDVB, PMOVSXDQ, PMOVSXWQ,
PMOVSXWD, PMOVSXBQ, PMOVSXBD, PMOVSXBW, PMOVZXDQ, PMOVZXWQ, PMOVZXWD, PMOVZXWD, PMOVZXBQ, PMOVZXBD, PMOVZXBW.

Also fix bug in PACKUSWB_XMM_M, it was marked as sign operation, though it is unsigned.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1308

Change-Id: I1a8d26c0426690841dcc80a6fa5dcffb8cbc5d9a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67737
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-13 10:24:16 +00:00
Gabriel Busnot
99852d5687 sim: Deprecate pointer version of MemberEventWrapper constructor
It makes no sense to initialize such event with nullptr. Favor the
reference version for safer behavior.

Change-Id: I695f41362a56aca98ceb52d49cf84be43f1465a2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67656
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
2023-03-13 06:47:09 +00:00