Commit Graph

199 Commits

Author SHA1 Message Date
Jason Lowe-Power
b3e7af9d79 Support for classic prefetchers in Ruby (#502)
This patch adds supports for using the "classic" prefetchers with ruby
cache controllers.

This pull request includes a few commits making the changes in this
order:
- Refactor decouples the classic cache and prefetchers interfaces
- Extras probes for later integration with ruby
- General ruby-side support
- Adds support for the CHI protocol

Commit [mem-ruby: support prefetcher in CHI
protocol](2bdb65653b)
may be used as example on how to add support for other protocols.

JIRA issues that may be related to this pull request:
    https://gem5.atlassian.net/browse/GEM5-457
    https://gem5.atlassian.net/browse/GEM5-1112
2023-11-30 10:24:29 -08:00
Bobby R. Bruce
d11c40dcac misc: Run pre-commit run --all-files
This ensures `isort` is applied to all files in the repo.

Change-Id: Ib7ced1c924ef1639542bf0d1a01c5737f6ba43e9
2023-11-29 22:06:41 -08:00
Tiago Mück
3a7192d682 mem-cache: change hasBeenPrefetched
hasBeenPrefetched can now take a requestor id and returns true only if
the block was prefetched by a prefetcher with the same id. This may be
necessary to properly train multiple prefetchers attached to the same
cache. If returns true if the block was prefetched by any prefetcher
when the id is not provided.

Related JIRA:
https://gem5.atlassian.net/browse/GEM5-457
https://gem5.atlassian.net/browse/GEM5-1112

Change-Id: I205e000fd5ff100e5a5d24d88bca7c6a46689ab2
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
2023-11-28 18:30:49 -06:00
Tiago Mück
a63ff3c442 mem-cache: add prefetcher listener for evictions
Listener to data update probe notifies prefetcher of evictions.
Prefetchers need to implement notifyEvict to make use of this
information.

Related JIRA:
https://gem5.atlassian.net/browse/GEM5-457
https://gem5.atlassian.net/browse/GEM5-1112

Change-Id: I052cfdeba1e40ede077554ada104522f6a0cb2c7
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
2023-11-28 18:30:49 -06:00
Tiago Mück
becba00d95 mem-cache,configs: remove extra prefetch_* params
Remove the prefetch_on_access and prefetch_on_pf_hit from BaseCache.
BasePrefetch no longer expects this params to exist in the parent.

Configurations that set these parameter using the cache object were
fixed.

Change-Id: I9ab6a545eaf930ee41ebda74e2b6b8bad0ca35a7
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
2023-11-28 18:30:49 -06:00
Tiago Mück
af2ee0db30 mem-cache: decoupled prefetchers from cache
This patches decouples the prefetchers from the cache implementation
as the first step to allow using the classic prefetchers with ruby
caches. The prefetchers that need do cache lookups can do so using
the accessor object provided when the probes are notified. This may
also facilitate connecting the same prefetcher to multiple caches.

Related JIRA:
https://gem5.atlassian.net/browse/GEM5-457
https://gem5.atlassian.net/browse/GEM5-1112

Change-Id: I4fee1a3613ae009fabf45d7b747e4582cad315ef
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
2023-11-28 18:30:49 -06:00
Bobby R. Bruce
f26867a075 mem-cache: Revert "Prefetchers Improvements"
Reverts PR https://github.com/gem5/gem5/pull/564

Reverts commits:

* 047a494c2b
* 2abd65c270
* 38045d7a25
* 6416304e07
* 8598764a03

Change-Id: Id523acc1778c3f827637302a6465f5a9e539d6b5
2023-11-20 19:49:04 -08:00
Giacomo Travaglini
047a494c2b mem-cache: Optimize strided prefetcher address generation
This commit optimizes the address generation logic in the strided
prefetcher by introducing the following changes

(d is the degree of the prefetcher)

* Evaluate the fixed prefetch_stride only once (and not d-times)
* Replace 2d multiplications (d * prefetch_stride and distance *
prefetch_stride) with additions by updating the new base prefetch
address while looping

Change-Id: I49c52333fc4c7071ac3d73443f2ae07bfcd5b8e4
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-by: Tiberiu Bucur <tiberiu.bucur@arm.com>
2023-11-16 09:48:15 +00:00
Nikolaos Kyparissas
2abd65c270 mem: added distance parameter to stride prefetcher
The Stride Prefetcher will skip this number of strides ahead of the
first identified prefetch, then generate `degree` prefetches at
`stride` intervals. A value of zero indicates no skip (i.e. start
prefetching from the next identified prefetch address).

This parameter can be used to increase the timeliness of prefetches by
starting to prefetch far enough ahead of the demand stream to cover
the memory system latency.

[Richard Cooper <richard.cooper@arm.com>:
- Added detail to commit comment and `distance` Param documentation.
- Changed `distance` Param from `Param.Int` to `Param.Unsigned`.
]

Change-Id: I6c4e744079b53a7b804d8eab93b0f07b566f0c08
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Signed-off-by: Richard Cooper <richard.cooper@arm.com>
2023-11-16 09:48:09 +00:00
Nikolaos Kyparissas
38045d7a25 mem-cache: Added clean eviction check for prefetchers.
pkt->req->isCacheMaintenance() would not include a check
for clean eviction before notifying the prefetcher,
causing gem5 to crash.

Change-Id: I1d082a87a3908b1ed46c5d632d45d8b09950b382
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2023-11-14 15:20:52 +00:00
Richard Cooper
8598764a03 mem-cache: Squash prefetch queue entries by block address.
Prefetch queue entries were being squashed by comparing the address
of each queued prefetch against the block address of the demand
access. Only prefetches that happen to fall on a cache-line block
boundary would be squashed.

This patch converts the prefetch addresses to block addresses before
comparison.

Change-Id: I55ecb4919e94ad314b91c7795bba257c550b1528
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2023-11-14 15:20:52 +00:00
Bobby R. Bruce
298119e402 misc,python: Run pre-commit run --all-files
Applies the `pyupgrade` hook to all files in the repo.

Change-Id: I9879c634a65c5fcaa9567c63bc5977ff97d5d3bf
2023-10-10 21:47:07 -07:00
Daniel R. Carvalho
65c15ba188 mem-cache: Remove the Prefetcher namespace
This namespace has gone through the deprecation period
and can now be removed.

Change-Id: I31953be7ce8566576de94c9296eeeec601c9906a
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67353
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-01-17 09:16:20 +00:00
Daniel R. Carvalho
d4c1904ce6 mem-cache: Remove the ReplacementPolicy namespace
This namespace has gone through the deprecation period
and can now be removed.

Change-Id: If4904706b897999e9200b163d47679519f01e4d4
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67352
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-01-17 09:16:20 +00:00
Nathanael Premillieu
6e74deb46f mem-cache: use MMU instead of TLB in prefetchers
BaseMMU object is now the entry point for translation
requests. In the prefetchers, a BaseTLB object is still
used if translation is needed.
This patch is changing it to a BaseMMU object.

Change-Id: I47dc92d4bc4a5c4f7c4c6181f7b7e126db6bd529
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66831
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
2023-01-16 11:04:16 +00:00
Bobby R. Bruce
787204c92d python: Apply Black formatter to Python files
The command executed was `black src configs tests util`.

Change-Id: I8dfaa6ab04658fea37618127d6ac19270028d771
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47024
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-08-03 09:10:41 +00:00
Majid Jalili
714b9b2356 mem-cache: adding round-robin aribitration to multiprefetchers
To find a candidate in cache base.cc, function getPacket
is called. In case of multi-prefetchers, we alyways start
from the first prefetcher. Given the default value for "latency"
is 1, there is always a candidate ready for prefech by prefetcher 0.
Hence, we need an arbitration mechansim to cycle through
all prefechers. To make this fair, we added a variable to save what
prefetcher first used to get a packet from, and in the next round,
 we start from the next prefetcher to give every prefetcher a chance
to be the first one in a round-robin fashion.

JIRA Ticket: https://gem5.atlassian.net/browse/GEM5-1169

Change-Id: I1c6a267b2bf71764559a080371c1d7f8be95ac71
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/56265
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-02-08 16:51:46 +00:00
Jiasen Huang
ec32f6c6f0 mem-cache: Add switch on/off duplicate entries into RMOB
Change-Id: I394d7c852a439be5315c4755b091c8741e671ea3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55083
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-05 01:18:14 +00:00
Jiasen Huang
66e6e59666 mem-cache: pstAddress should be inserted into PST in STeMS
Change-Id: Ib2c4c5fb0fec32e63947d3ee8dcb5c3d7e2555ab
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55084
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-01-05 01:14:48 +00:00
Jiasen Huang
398d4f9d07 mem-cache: Init lastTriggerCounter for STeMS Prefetcher
Change-Id: I43a0093e6d35a39799d724e7dee15c95dbc26343
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54643
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-23 01:40:09 +00:00
Jiasen Huang
735f768cc8 mem-cache: Added stats filtering both useful and spanPage prefetch.
Change-Id: I2570ee47f064ac999f2dcc813c9e39174a2ad8af
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/54163
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-17 01:04:21 +00:00
Gabe Black
1c233ee9d2 scons: Add sim_object and enums arguments to SimObject().
This will explicitly declare what SimObject and Enum types need to be set
up in C++, which will make importing all the SimObject modules during
the setup phase of SCons uneccessary.

Change-Id: Id2d7603daf33b236ceaa0789e2f089f589d34e62
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49406
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-08 08:01:23 +00:00
Gabe Black
ba5f68db3d misc: Use python 3's argumentless super().
When calling a method in a superclass, you can/should use the super()
method to get a reference to that class. The python 2 version of that
method takes two parameters, the current class name, and the "self"
instance. The python 3 version takes no arguments. This is better for a
at least three reasons.

First, this version is less verbose because you don't have to specify
any arguments.

Second, you don't have to remember which argument goes where (I always
have to look it up), and you can't accidentally use the wrong class
name, or forget to update it if you copy code from a different class.

Third, this version will work correctly if you use a class decorator.
I don't know exactly how the mechanics of this work, but it is referred
to in a comment on this stackoverflow question:

https://stackoverflow.com/questions/681953/how-to-decorate-a-class

Change-Id: I427737c8f767e80da86cd245642e3b057121bc3b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52224
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-11-09 13:04:44 +00:00
Gabe Black
d6974ef636 mem: Add a page_bytes parameter to the classic prefetcher.
This parameter is used to figure out if two addresses are on the same or
different pages, and could be used to find what page they were on and
the page offset, although it doesn't look like the later two are
actually used.

This value could possibly come from the TLB parameter attached to the
prefetcher, but making it explicit makes these more symmetric with the
Ruby prefetcher, and reduces the complexity of the TLB implementation.

Change-Id: I6921943c49af19971b84225ecfd1127304363426
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50352
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2021-09-30 00:31:29 +00:00
Nathanael Premillieu
2462e650ba mem-cache: reuse local variable in QueuedPrefetcher
Reuse local variable for PA in Queued::translationComplete.

Change-Id: Id3c0333ac1bf019ac21162aedf69f6019c818e30
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48684
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
2021-07-30 13:13:37 +00:00
Nathanael Premillieu
393a964266 mem-cache: print VA and PA in the prefetch queues
As prefetcher can use VA and need translation, it is
interesting to see both VA and PA when printing the queues.
PA is printed as 0 if translation has not happened yet.
Also fix a bug when the pkt is not yet created.

Change-Id: I7cd225379c2930a8d6a7882efdb3dc7bc49fb8a3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48683
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
2021-07-30 07:35:48 +00:00
Gabe Black
b3b81196aa misc: Replace type_traits.hh XX::value with XX_v.
Now that we're using c++17, the type_traits with a ::value member have
a _v alias which reduces verbosity. Or on other words

std::is_integral<T>::value

can be replaced with

std::is_integral_v<T>

Make this substitution throughout the code base. In places where gem5
introduced it's own similar templates, add a V alias, spelled
differently to match gem5's internal style.

gem5: :IsVarArgs<T>::value => gem5::IsVarArgsV<T>
Change-Id: I1d84ffc4a236ad699471569e7916ec17fe5f109a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48604
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-28 01:48:03 +00:00
Gabe Black
2f42e79956 mem: Use the new "debug" namespace, and not "Debug".
The "Debug" namespace is deprecated and has been replaced by "debug".

Change-Id: Ic8e9082361a6717f3b07990dbaa1a66b0926f000
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48647
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-27 21:32:21 +00:00
Nathanael Premillieu
5c7e1bd917 mem-cache: adding late prefetch stats
Adding a late prefetch stat plus stats for each reason a prefetch can be
detected as late

Change-Id: Ia6d5294e8ce58b2b0aae2be98fd0cee83be73b8d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47204
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-09 22:30:45 +00:00
Nathanael Premillieu
0339f34b87 mem-cache: count pf filtered by demand to the same cache line
Add a stat to count how many prefetch request are filtered in the
prefetch queue becasue a demand is going to the same cache line
Also adding a corresponding debug statement for when it happens

Change-Id: I52475f19bd109c135b7259d08d5f5c0b5fd90ee5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47203
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2021-07-09 22:30:45 +00:00
Nathanael Premillieu
b193c0adfd mem-cache: add option to send pf on hit on pf
From the point of view of the prefetchers, a hit on a prefetched block
should be considered the same as a miss: a new prefetch should be
generated.

Change-Id: If865324502b81cfd3ae8c009666d3f498092b90f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47201
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
2021-07-09 22:30:45 +00:00
Nathanael Premillieu
352ae672e2 mem-cache: accuracy and coverage stat for prefetchers
Add an accuracy and coverage stat for the prefetchers.
Accuracy is defined as the ratio of the number of prefetch
request that have been counted as useful over the number
of prefetch request issued.
Accuracy tells whether the prefetcher is producing useful
requests or not.
Coverage is defined as the ratio of of the number of prefetch
request that have been counted as useful over the number of
demand misses if there was no prefetch, which is counted as
the number of useful prefetch request plus the remaining
demand misses. Due to the way stats are defined in the cache,
I have to add a stat to count the number of remaining demand
misses directly in the prefetcher stat. Demand is defined
as being one of this request type: ReadReq, WriteReq,
WriteLineReq, ReadExReq, ReadCleanReq, ReadSharedReq.
Coverage tells what part of misses are covered by the prefetcher.

Change-Id: I3bb8838f87b42665fdd782889f6ba56ca2a802fc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47603
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-09 22:30:45 +00:00
Nathanael Premillieu
c66f32f24e mem-cache: add a prefetch useful stat
Count how many time a prefetch is useful, meaning
a hit has happened on a prefetched cache block.
Another stat (pfUsefulButMiss) has been added to count
the special case where there is a hit on prefetched block
but it is counted as a miss because the block is not in
the requested coherency state.

Change-Id: I253216b9ac96d5f21139b710c489d6eb3fce7136
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47602
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-09 22:30:45 +00:00
Nathanael Premillieu
cf0881433b mem-cache: add pfIssued stat in MultiPrefetcher
Count issued prefetches for each prefetchter in a MultiPrefetcher

Change-Id: If03fb0669af9bb92ce9cf210b6201a9719a7c771
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47600
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
2021-07-09 22:30:45 +00:00
Nathanael Premillieu
85a8dbf761 mem-cache: move unusedPrefetches stat to prefetcher
This stat belongs to prefetchers.
It has been renamed to pfUnused to match the naming of
exisiting prefetcher stats.

Change-Id: Iec350a62da544535dfc0c2527fcdf73217ae4db7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47599
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-09 22:30:45 +00:00
Nathanael Premillieu
f3e7d02150 mem-cache: print prefetch queues in Queued prefetcher
Added to track the content of the prefetch queues in the debug output

Change-Id: I49d0f4f643ec0dbd7af3087b6267d454cfccddba
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47199
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-09 22:30:45 +00:00
Giacomo Travaglini
d1cdcb311b misc: Move Mode and Translation from BaseTLB to BaseMMU
This is a step towards moving most of the TLB logic to the
MMU class.

Change-Id: Id6b1fb30aa89960705f165f9738f5b50aa1e6bdb
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46779
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-07 08:44:13 +00:00
Daniel R. Carvalho
974a47dfb9 misc: Adopt the gem5 namespace
Apply the gem5 namespace to the codebase.

Some anonymous namespaces could theoretically be removed,
but since this change's main goal was to keep conflicts
at a minimum, it was decided not to modify much the
general shape of the files.

A few missing comments of the form "// namespace X" that
occurred before the newly added "} // namespace gem5"
have been added for consistency.

std out should not be included in the gem5 namespace, so
they weren't.

ProtoMessage has not been included in the gem5 namespace,
since I'm not familiar with how proto works.

Regarding the SystemC files, although they belong to gem5,
they actually perform integration between gem5 and SystemC;
therefore, it deserved its own separate namespace.

Files that are automatically generated have been included
in the gem5 namespace.

The .isa files currently are limited to a single namespace.
This limitation should be later removed to make it easier
to accomodate a better API.

Regarding the files in util, gem5:: was prepended where
suitable. Notice that this patch was tested as much as
possible given that most of these were already not
previously compiling.

Change-Id: Ia53d404ec79c46edaa98f654e23bc3b0e179fe2d
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46323
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-01 19:08:24 +00:00
sacak32
b0f534346a mem-cache: queued prefetcher bug fix
In queued prefetcher, addToQueue function doesn't behave
correctly where the element must be added to the end of queue.
I fixed this bug.

Change-Id: I1eec129f827b6465e7cef874c551d96acbf18d5b
Signed-off-by: Burak Öçalan <byrakocalan99@gmail.com>
Reported-by: Burak Öçalan <byrakocalan99@gmail.com>
Tested-by: Burak Öçalan <byrakocalan99@gmail.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46759
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-12 08:21:04 +00:00
Arthur Perais
c01b9cd62b mem: Fix bandwidth-delay calculation in AMPM prefetcher
The AMPM paper (https://www.jilp.org/vol13/v13paper3.pdf) defines
the bandwidth-delay calculation as :

  Mbandwidth= (Nrequests/Tepoch)×Tlatency

In the code, Tepoch and Tlatency are in ticks (which is okay),
but Tepoch is converted from Cycles (256K) to Ticks using the
clockEdge(Cycle c) function, which is incorrect as it yields currentTick
+ c * clockPeriod() instead of just c * clockPeriod().
In other words, the divider keeps increasing as time advances.

This patch substitutes clockEdge() with cyclesToTicks() to keep
the epoch length (Tepoch) constant throughout simulation.

Change-Id: I69dee29892fa4b9eb8de8715fd72a535e122687f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46479
Reviewed-by: Nathanael Premillieu <nathanael.premillieu@huawei.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-05 16:24:41 +00:00
Arthur Perais
efc9a68620 mem: Fix Best Offset Prefetcher (BOP) learning phase code.
According to the DPC paper : "If the best score is less
than or equal to a fixed value BADSCORE, we turn prefetchoff
during the next phase"

However, the current code will turn prefetch off if the best
*offset* of the learning phase is less than BADSCORE, which
is incorrect.

Change-Id: Ib5790fe1341f2dd6328ec3b018bc52012e376723
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46259
Reviewed-by: Nathanael Premillieu <nathanael.premillieu@huawei.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-01 19:36:20 +00:00
Daniel R. Carvalho
98ac080ec4 base-stats,misc: Rename Stats namespace as statistics
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Stats became ::statistics.

"statistics" was chosen over "stats" to avoid generating
conflicts with the already existing variables (there are
way too many "stats" in the codebase), which would make
this patch even more disturbing for the users.

Change-Id: If877b12d7dac356f86e3b3d941bf7558a4fd8719
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45421
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
e291376f07 cpu,mem: Rename ContextSwitchTaskId namespace
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::ContextSwitchTaskId becomes ::context_switch_task_id.

Change-Id: If3884a5da7afe6144954d556b3b54f659bb7afb5
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45411
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
df72e9d548 mem-cache: Rename Prefetcher namespace as prefetch
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Prefetcher became ::prefetcher.

"prefetch" was chosen over "prefetcher" to avoid generating
conflicts with the already existing variables. "prefetcher"
is a name that is expected to be more common in user's code
than "prefetch".

Change-Id: I8f07217f278a0229e05545b7847f2620ed208c66
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45410
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
17897bb3f6 mem: Rename ReplacementPolicy namespace as replacement_policy
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::ReplacementPolicy became ::replacement_policy.

Change-Id: Id46cd9d89e9424fd3c5484e2f9c69ef2b73f135b
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45405
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-27 08:32:55 +00:00
Daniel R. Carvalho
3016478068 base-stats: Rename Units namespace as units
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

Stats::Units became Stats::units.

Change-Id: I9ce855b291db122d952098a090a2984b42152850
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45415
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-26 22:30:33 +00:00
Gabe Black
4abe9ac08b misc: Switch away from the deprecated UNIT_* macros.
Expand the macros in place.

Change-Id: I5dba512b99a1204c23a995e112248b86523b77c8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45560
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-19 21:42:34 +00:00
Daniel R. Carvalho
7f1de4e686 misc: Fix coding style for enum's opening braces
The systemc dir was not included in this fix.

First it was identified that there were only occurrences
at 0, 1, and 2 levels of indentation (and 2 of 2 spaces,
1 of 3 spaces and 2 of 12 spaces), using:

    grep -nrE --exclude-dir=systemc \
        "^ *enum [A-Za-z].* {$" src/

Then the following commands were run to replace:

    <indent level>enum X ... {

by:

    <indent level>enum X ...
    <indent level>{

Level 0:
    grep -nrl --exclude-dir=systemc \
        "^enum [A-Za-z].* {$" src/ | \
        xargs sed -Ei \
        's/^enum ([A-Za-z].*) \{$/enum \1\n\{/g'

Level 1:
    grep -nrl --exclude-dir=systemc \
        "^    enum [A-Za-z].* {$" src/ | \
        xargs sed -Ei \
        's/^    enum ([A-Za-z].*) \{$/    enum \1\n    \{/g'

and so on.

Change-Id: Ib186cf379049098ceaec20dfe4d1edcedd5f940d
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43326
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-23 16:26:04 +00:00
Daniel R. Carvalho
2922f763e1 misc: Fix coding style for struct's opening braces
The systemc dir was not included in this fix.

First it was identified that there were only occurrences
at 0, 1, 2 and 3 levels of indentation (and a single
occurrence of 2 and 3 spaces), using:

    grep -nrE --exclude-dir=systemc \
        "^ *struct [A-Za-z].* {$" src/

Then the following commands were run to replace:

<indent level>struct X ... {

by:

<indent level>struct X ...
<indent level>{

Level 0:
    grep -nrl --exclude-dir=systemc
        "^struct [A-Za-z].* {$" src/ | \
        xargs sed -Ei \
        's/^struct ([A-Za-z].*) \{$/struct \1\n\{/g'

Level 1:
    grep -nrl --exclude-dir=systemc \
        "^    struct [A-Za-z].* {$" src/ | \
        xargs sed -Ei \
        's/^    struct ([A-Za-z].*) \{$/    struct \1\n    \{/g'

and so on.

Change-Id: I362ef58c86912dabdd272c7debb8d25d587cd455
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39017
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-19 20:57:24 +00:00
Daniel R. Carvalho
469f0671d1 misc: Fix coding style for class-opening braces
The systemc dir was not included in this fix.

First it was identified that there were only occurrences
at 0, 1, and 2 levels of indentation, using:

    grep -nrE --exclude-dir=systemc \
        "^ *class [A-Za-z].* {$" src/

Then the following commands were run to replace:

<indent level>class X ... {

by:

<indent level>class X ...
<indent level>{

Level 0:
    grep -nrl --exclude-dir=systemc
        "^class [A-Za-z].* {$" src/ | \
        xargs sed -Ei \
        's/^class ([A-Za-z].*) \{$/class \1\n\{/g'

Level 1:
    grep -nrl --exclude-dir=systemc \
        "^    class [A-Za-z].* {$" src/ | \
        xargs sed -Ei \
        's/^    class ([A-Za-z].*) \{$/    class \1\n    \{/g'

and so on.

Change-Id: I17615ce16a333d69867b27c7bae0f4fdafd8b2eb
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39015
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-19 20:57:24 +00:00