mem-cache: adding late prefetch stats

Adding a late prefetch stat plus stats for each reason a prefetch can be
detected as late

Change-Id: Ia6d5294e8ce58b2b0aae2be98fd0cee83be73b8d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47204
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>

src/mem/cache/base.cc

@@ -52,6 +52,7 @@
 #include "debug/CachePort.hh"
 #include "debug/CacheRepl.hh"
 #include "debug/CacheVerbose.hh"
+#include "debug/HWPrefetch.hh"
 #include "mem/cache/compressors/base.hh"
 #include "mem/cache/mshr.hh"
 #include "mem/cache/prefetch/base.hh"
@@ -825,9 +826,25 @@ BaseCache::getNextQueueEntry()
         PacketPtr pkt = prefetcher->getPacket();
         if (pkt) {
             Addr pf_addr = pkt->getBlockAddr(blkSize);
-            if (!tags->findBlock(pf_addr, pkt->isSecure()) &&
-                !mshrQueue.findMatch(pf_addr, pkt->isSecure()) &&
-                !writeBuffer.findMatch(pf_addr, pkt->isSecure())) {
+            if (tags->findBlock(pf_addr, pkt->isSecure())) {
+                DPRINTF(HWPrefetch, "Prefetch %#x has hit in cache, "
+                        "dropped.\n", pf_addr);
+                prefetcher->pfHitInCache();
+                // free the request and packet
+                delete pkt;
+            } else if (mshrQueue.findMatch(pf_addr, pkt->isSecure())) {
+                DPRINTF(HWPrefetch, "Prefetch %#x has hit in a MSHR, "
+                        "dropped.\n", pf_addr);
+                prefetcher->pfHitInMSHR();
+                // free the request and packet
+                delete pkt;
+            } else if (writeBuffer.findMatch(pf_addr, pkt->isSecure())) {
+                DPRINTF(HWPrefetch, "Prefetch %#x has hit in the "
+                        "Write Buffer, dropped.\n", pf_addr);
+                prefetcher->pfHitInWB();
+                // free the request and packet
+                delete pkt;
+            } else {
                 // Update statistic on number of prefetches issued
                 // (hwpf_mshr_misses)
                 assert(pkt->req->requestorId() < system->maxRequestors());
@@ -837,9 +854,6 @@ BaseCache::getNextQueueEntry()
                 // that we send the packet straight away, so do not
                 // schedule the send
                 return allocateMissBuffer(pkt, curTick(), false);
-            } else {
-                // free the request and packet
-                delete pkt;
             }
         }
     }

src/mem/cache/prefetch/base.cc

@@ -134,7 +134,15 @@ Base::StatGroup::StatGroup(statistics::Group *parent)
     ADD_STAT(accuracy, statistics::units::Count::get(),
         "accuracy of the prefetcher"),
     ADD_STAT(coverage, statistics::units::Count::get(),
-    "coverage brought by this prefetcher")
+    "coverage brought by this prefetcher"),
+    ADD_STAT(pfHitInCache, statistics::units::Count::get(),
+        "number of prefetches hitting in cache"),
+    ADD_STAT(pfHitInMSHR, statistics::units::Count::get(),
+        "number of prefetches hitting in a MSHR"),
+    ADD_STAT(pfHitInWB, statistics::units::Count::get(),
+        "number of prefetches hit in the Write Buffer"),
+    ADD_STAT(pfLate, statistics::units::Count::get(),
+        "number of late prefetches (hitting in cache, MSHR or WB)")
 {
     using namespace statistics;
 
@@ -145,6 +153,8 @@ Base::StatGroup::StatGroup(statistics::Group *parent)
 
     coverage.flags(total);
     coverage = pfUseful / (pfUseful + demandMshrMisses);
+
+    pfLate = pfHitInCache + pfHitInMSHR + pfHitInWB;
 }
 
 bool

src/mem/cache/prefetch/base.hh

@@ -343,6 +343,20 @@ class Base : public ClockedObject
         statistics::Scalar pfUsefulButMiss;
         statistics::Formula accuracy;
         statistics::Formula coverage;
+
+        /** The number of times a HW-prefetch hits in cache. */
+        statistics::Scalar pfHitInCache;
+
+        /** The number of times a HW-prefetch hits in a MSHR. */
+        statistics::Scalar pfHitInMSHR;
+
+        /** The number of times a HW-prefetch hits
+         * in the Write Buffer (WB). */
+        statistics::Scalar pfHitInWB;
+
+        /** The number of times a HW-prefetch is late
+         * (hit in cache, MSHR, WB). */
+        statistics::Formula pfLate;
     } prefetchStats;
 
     /** Total prefetches issued */
@@ -385,6 +399,24 @@ class Base : public ClockedObject
         prefetchStats.demandMshrMisses++;
     }
 
+    void
+    pfHitInCache()
+    {
+        prefetchStats.pfHitInCache++;
+    }
+
+    void
+    pfHitInMSHR()
+    {
+        prefetchStats.pfHitInMSHR++;
+    }
+
+    void
+    pfHitInWB()
+    {
+        prefetchStats.pfHitInWB++;
+    }
+
     /**
      * Register probe points for this object.
      */