Commit Graph

14757 Commits

Author SHA1 Message Date
Bobby R. Bruce
994c72948e misc: Updated old gem5 website URLs with new gem5 website URLs
Jira: https://gem5.atlassian.net/browse/GEM5-272
Change-Id: Ieadb6dd7a44dde4b0be647c91896551822b06a57
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24503
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-29 16:17:32 +00:00
Ayaz Akram
e1219b26f4 cpu: move initCPU calls from initState to init
This commit moves the initCPU calls from initState to init
of base cpu (which were added in commit 0b8d02dec4).
This is a temporary fix to solve the problem of X86System
initState getting called before initState of base cpu.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-292

Change-Id: I7434cd811536175562cfa2646f4326907fadad8c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24884
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-29 05:39:07 +00:00
Adrian Herrera
eacc7c7e98 system-arm: AArch64 boot, init CNTFRQ_EL0
CNTFRQ_EL0 should be initialised to a uniform value in all cores present
in the system. Previously, this was only done if EL3 was present,
however architecture states CNTFRQ_EL0 may be written from the highest
EL implemented.
This patch moves this initilization outside of the EL3-only one.

Change-Id: Ibaa197de53d531ba898e5137ba4f46a8c9554699
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24683
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-27 16:39:23 +00:00
Gabe Black
13083a1c9c sim: Add a GuestABI mechanism to allocate space for a return value.
Some ABIs (including 32 bit ARM, 64 bit x86) allocate their argument
registers differently depending on their return value. For instance,
if the value needs to be returned in memory because it's too big,
the caller could pass a pointer to where the result should be stored
when the function returns. This pointer acts like an invisible first
argument, offsetting where all the normal arguments actually live.

This change adds a mechanism to handle that case. The Result templates
can now declare an allocate() static method which is given a
ThreadContext *, and a reference to the Position object. It can perform
any adjustment it needs to before the normal argument extraction
starts.

Change-Id: Ibda9095f0e8c9882742d24f5effe309ccb514188
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23747
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2020-01-25 07:47:17 +00:00
Bobby R. Bruce
377898c403 tests: Removed 70.twolf tests
In an effort to cleanup the old tests, and migrate useful tests to be
executed via `test/main.py`, it has been decided that the
`test/quick/70.twolf` tests should be removed.

Jira: https://gem5.atlassian.net/browse/GEM5-109
Change-Id: I19f2e20298e14a92f49adf0b8369e1fa09e0c1bc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24383
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-24 06:02:32 +00:00
Bobby R. Bruce
db8969f1ef tests: Removed old quick/se/00.hello test resources
Change-Id: I0579e2b7a131c679fd7488457595f046702d64ef
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24326
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-24 06:02:20 +00:00
Bobby R. Bruce
f3e4652f22 tests: Removed the old ALPHA tests
Jira: https://gem5.atlassian.net/browse/GEM5-109
Change-Id: Id24c84c70d977f7dbd2815b862af9b7eab638aca
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24388
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-24 05:48:39 +00:00
Bobby R. Bruce
dfe8de1157 tests: Removed 50.vortex tests
In an effort to cleanup the old tests, and migrate useful tests to be
executed via `test/main.py`, it has been decided that the
`test/long/se/50.vortex` tests should be removed.

Jira: https://gem5.atlassian.net/browse/GEM5-109
Change-Id: I9c40ca74aad11a80bd2a91bd67c9561ffa76e78f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24387
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-24 05:48:39 +00:00
Bobby R. Bruce
351b33699a tests: Removed 60.bzip2 tests
In an effort to cleanup the old tests, and migrate useful tests to be
executed via `test/main.py`, it has been decided that the
`test/quick/60.bzip2` tests should be removed.

Jira: https://gem5.atlassian.net/browse/GEM5-109
Change-Id: I8469814a2f4715655960b9049182e426e10380ed
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24385
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-24 05:48:26 +00:00
Bobby R. Bruce
43ea4e01a0 tests: Removed 30.eon tests
In an effort to cleanup the old tests, and migrate useful tests to be
executed via `test/main.py`, it has been decided that the
`test/long/se/30.eon` tests should be removed.

Jira: https://gem5.atlassian.net/browse/GEM5-109
Change-Id: Ieb32196a5f0ed3b3375ede5aec6f8fb8d162a865
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24386
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-24 05:48:14 +00:00
Bobby R. Bruce
6a87e1ff04 tests: Removed 40.perlbmk tests
In an effort to cleanup the old tests, and migrate useful tests to be
executed via `test/main.py`, it has been decided that the
`test/long/se/40.perlbmk` tests should be removed.

Jira: https://gem5.atlassian.net/browse/GEM5-109
Change-Id: I3c7ea79717c90acf0656f30b878eb3f9f33fdb70
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24403
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-24 05:48:14 +00:00
Bobby R. Bruce
331d3cf417 tests: Removed 20.parser tests
In an effort to cleanup the old tests, and migrate useful tests to be
executed via `test/main.py`, it has been decided that the
`test/long/se/70.twolf` tests should be removed.

Jira: https://gem5.atlassian.net/browse/GEM5-109
Change-Id: Ie0c0cd310ee51a37e80a84af3bf1cb603061da7c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24384
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-24 05:47:53 +00:00
Gabe Black
7b62df85f8 cpu: Fix ExeTraceRecord::traceInst.
A recent-ish change modified ExeTraceRecord::traceInst to make it more
consistent with DPRINTF-s by using dprintf_flag to print the trace
string. The generated string was passed as the format however, and that
means that all % characters in the output (from register names, for
example) are interpreted as format characters, mangling the output and
making cprintf angry since there are no corresponding arguments.

This change sets the format to "%s" instead, and passes the trace
string as the first argument. The argument won't be parsed for format
specifiers, and so should no longer get mangled.

Change-Id: I8fa9c2c22179a5b55104a618a4af4080a3931c5f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24643
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-23 23:45:15 +00:00
Gabe Black
46fbd76595 sim: Move findFreeContext to System.
This method searches through the ThreadContexts stored in the system,
and has no concrete connection to Process other than it happened to be
used by a Process in the clone system call.

By moving it, we can use its functionality in classes other than
Process.

Change-Id: Ic6899c335dc13841c6fe948ea3a4f8ad67e562bb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24285
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-23 23:38:25 +00:00
Gabe Black
e3c3d2a1a8 sim: Eliminate the breakAtKernelFunction function.
It looks like this function is supposed to allow you to set up a PC
based event which will trigger when the simulator executes a particular
kernel function. That event doesn't actually do anything, but you can
set a breakpoint there with gdb when debugging gem5 itself.

There are a couple of problems with this function. First, it assumes
that you want to set the breakpoint based on the first system in your
simulation. Frequently simulations have only one system, but there
isn't any rule that says they must, or any way to pick a different
system.

Second, this function assumes that you're in FS mode, that there is a
kernel, and that there is a kernel symbol table to look symbols up in.

On top of that, this function is a bit redundant since you can just use
gdb to debug the kernel inside a simulated system.

Change-Id: I8dadbd42fc7d4ccba2a035a2a72e6ede4b872f3c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24644
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-23 23:36:35 +00:00
Adrian Herrera
b0de06c5d3 dev-arm: SP805 peripherals in VExpress_GEM5_Base
This patch adds the SP805 watchdog peripherals to the
VExpress_GEM5_Base platform.

Change-Id: I5c597d4d169359c1bde4bc4c7b3403091c772808
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24206
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
2020-01-23 12:56:28 +00:00
Bobby R. Bruce
7eff800801 tests: Removing 10.mcf tests
10.mcf depends upon the proprietary SPEC benchmarks. It has been decided
that tests which rely on them should be removed.

Change-Id: If7ce915072643294bb4eb683ca1647d1022ee352
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24325
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-23 01:01:48 +00:00
Gabe Black
0b8d02dec4 cpu: Consolidate and move the CPU's calls to TheISA::initCPU.
TheISA::initCPU is basically an ISA specific implementation of reset
logic on architectural state. As such, it only needs to be called if
we're not going to load a checkpoint, ie in initState.

Also, since the implementation was the same across all CPUs, this
change collapses all the individual implementations down into the base
CPU class.

Change-Id: Id68133fd7f31619c90bf7b3aad35ae20871acaa4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24189
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2020-01-23 00:51:57 +00:00
Ciro Santilli
ae7dd927e2 scons: fix --gold-linker build after --as-needed
The build was failing with:

/usr/bin/ld: unrecognized option '--as-needed -fuse-ld=gold'

and --verbose confirms that a single quoted CLI parameter was being
executed:

"-Wl,--as-needed -fuse-ld=gold"

This happened because at Ifb001786a66b0dd9b29865e39a5740313002f250
--as-needed was added, and because it is the second option to happen before
the following main.subst, it exposed the fact that the existing main.subst
was wrong, because it returns a string instead of the expected array.

Change-Id: I619d242d60fe9d27438638ac11c2b92512881f26
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24624
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-22 14:07:27 +00:00
Adrian Herrera
2f2f508c74 dev-arm: add Watchdog Module SP805 model
This provides a model of the Arm Watchdog Module SP805. This is based
on the public TRM rev. r1p0 (ARM DDI 0270B). Integration test harness
is not supported. Auto-generation of device tree entries is provided.

Change-Id: I6157cec2212d0a1d2685bcfa983d2acbae1f3377
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24205
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-22 11:37:13 +00:00
Adrian Herrera
c145876cef dev-arm: VExpress_GEM5_Base, add refclock 32KHz
This patch adds the reference 32KHz clock to VExpress_GEM5_Base derived
platforms. This is in preparation for supporting the SP805 Watchdog.
I/O voltage domain and platform clock domain coupling is transferred
to the __init__ method for correctness.

Change-Id: Ic743fd986793f1e43b75fa60260c9b43b2737763
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24204
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-22 11:37:13 +00:00
Giacomo Travaglini
23110678fd tests: Fix python line break in m5_exit test
A bug has been introduced with the new test url.
The line break should have used a backslash or (this is the recommended
way by PEP8) the implied line continuation via parenthesis.
This error was preventing the test to be loaded with the error message:

Exception thrown while loading
"/tmpfs/src/git/jenkins-gem5-prod/tests/gem5/m5_util/test_exit.py"
Ignoring all tests in this file.

and was not producing a failure (the test was not run: it was jus
ignored).

Change-Id: I0afe252d66d2f6546caaf5e7be811f34f88df82c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24625
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-22 11:12:52 +00:00
Gabe Black
1db6e702e9 fastmodel: Implement CC reg accessors.
Change-Id: I4d8a7eaa097446b6aa3483880c2a7ed1a2e0d97c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23790
Reviewed-by: Chun-Chen TK Hsu <chunchenhsu@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-22 07:11:58 +00:00
Gabe Black
4252c03c3f arm: Remove checkpointing from the ARM TLBs.
All of the state being checkpointed would either be provided by the
config directly, or would be brought into the TLB through normal fill
operations. Having this state in the checkpoint complicates the
checkpoint and significantly decreases compatibility with other TLB
implementations, or even variations of the same TLB, for instance if
the size was changed.

Change-Id: I4ea079dd01ff18fbc458b3aaaf88519dbcfdd869
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24389
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-22 07:09:05 +00:00
Gabe Black
11f7344cdc arch: Get rid of the unused (and mostly undefined) zeroRegisters.
Change-Id: Iadf56e4e742506af7ae4b617d2dc5a56439aa407
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24188
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-22 07:05:44 +00:00
Bobby R. Bruce
0b7d8428af misc: Updated CONTRIBUTING.md to discuss branches
There are some circumstances in which branches may be beneficial.
Though, in general, they should be discouraged. Therefore,
CONTRIBUTING.md has been enhanced to outline under what circumstances
creation of new branches is allowed and how they may be created and
used.

Change-Id: I2df8b38868e5c8146b068d9e7e957abbe3cf3b38
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24263
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-21 17:38:22 +00:00
Giacomo Travaglini
8483ff24f8 tests: Add a timeout to getremotetime
The helper is meant to check if the local binary is younger than the
remote binary (on gem5.org). If the call fails it is giving up and
it is just using the local regression (producing a warning).
The code is not handling the blocking behaviour of the connection:
simulaton might stall indefinitely
The patch is addressing this by providing a 10 seconds timeout.

Change-Id: I8f9c2e555c9a55d850a66d02f8e55f56ceda2ca3
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24531
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-01-21 13:54:52 +00:00
Adrian Herrera
5c3e8efeca dev-arm: add FixedClock SimObject
This patch adds a simple fixed-rate clock implementation based on
SrcClockDomain. This provides RealView-derived platform users with
a convenient way for auto-generating their platform clocks in the DTB.

Change-Id: Ifade0cc8ed1b9e3423745698442cac5d8b99ab63
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24223
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-21 09:57:41 +00:00
Giacomo Travaglini
454ba32c51 tests: Adding --bin-path option to select tests bin directory
So far lots of tests will download binaries inside the gem5 directory.
The path is also specific to the test being run.
This doesn't play well with an environment where gem5 is cloned from
scratch for every build, or if several gem5 are cloned in a single
machine.
Binaries will be automatically downloaded every time this happens.

This patch is adding a --bin-path option, so that it's possible to
setup a fixed directory with all pre-downloaded binaries.
By default it is set to None to preserve original behaviour.

Change-Id: I42fb25e3ce0a495c73672b15a097b1bd2607795c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24525
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-21 09:13:07 +00:00
Giacomo Travaglini
1a8f8e3e43 tests: fs/linux/arm passing M5_PATH via commandline
This will make it configurable from the testing framework

Change-Id: If82d5e44927c67a1eaecf41505d1d55a6469a4cf
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24524
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2020-01-21 09:13:07 +00:00
Daniel R. Carvalho
519808c02f mem-cache: Fix invalidation of prefetchers
Add an invalidation function to the AssociativeSet, so that entries
can be properly invalidated by also invalidating their replacement
data.

Both setInvalid and reset have been merged into invalidate to
indicate users that they are using an incorrect approach by
generating compilation errors, and to match CacheBlk's naming
convention.

Change-Id: I568076a3b5adda8b1311d9498b086c0dab457a14
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24529
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-21 08:07:05 +00:00
Jordi Vaquero
7ac4607385 arch-arm: Fix EL2 target exception level for SP alignment fault.
This commit fixes the target exception Level EL2 for alignmemt fault, it
is based on HCR_EL2.tge bit.

Change-Id: Ief78b2aa0c86f1c3d9a5d3ca00121d163a9d6a86
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24303
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-20 14:04:11 +00:00
Bobby R. Bruce
af02aa6a0d tests: Updated tests to download from http://dist.gem5.org
Previously some tests, and test resources, downloaded content from
http://gem5.org . This is being migrated to http://dist.gem5.org.
http://dist.gem5.org should be used to store and retrieve resources
going forward.

Change-Id: I7162c76b9b8dc07657a6ba50d643fc93c9824fdf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24548
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-18 23:24:44 +00:00
Daniel R. Carvalho
54a27b007a mem-cache: Add print function to ReplaceableEntry
Add a basic print function to acquire and display information about
replaceable entries.

Change-Id: I9640113d305fbe086c5bfaf8928a911bfcac50bb
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23567
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-01-17 20:41:50 +00:00
Daniel R. Carvalho
6eabbd49eb mem-cache: Add getter for the number of valid sub-blks
Add a getter function so that the number of valid sub-blocks can be
retrieved. As a side effect, make the respective counter private.

Change-Id: Icef8b51164c8e165872dcaebc65f5c330f16cb29
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22605
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2020-01-17 20:41:39 +00:00
Daniel R. Carvalho
62dfa5a1fb mem-cache: Add multiple eviction stats
Add stats to inform how many blocks were evicted due to a sector
replacement/eviction.

Change-Id: I886365506016d0888f835d182b3b65a808a9dccd
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22606
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2020-01-17 16:31:03 +00:00
Daniel R. Carvalho
37bcb128fa mem-cache: Make findVictim non-const
In order to acquire stats when a victim is found,
findVictim must be made const.

Change-Id: I493c7849f07625c90b2b95fd220f50751f4d0f52
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22604
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2020-01-17 16:31:03 +00:00
Daniel R. Carvalho
7ff32d7b53 mem-cache: Add more compression stats
Add stats to calculate the total number of compressions, decompressions
and the average compression size, in number of bits.

Change-Id: I5eb563856c1ff54216e1edcd2886332b7481cbfe
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22609
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2020-01-17 16:31:03 +00:00
Daniel R. Carvalho
7dce9e3782 mem-cache: Factor out multiple block eviction
Create a function to try to evict multiple blocks while checking for
transient state.

Change-Id: I6a879fa5e793cd92c4bdf4a258a133de4c865012
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22607
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2020-01-17 16:31:03 +00:00
Timothy Hayes
c5d87b0693 configs: MESI_Three_level python parameters
Allow specifying the L0 cache parameters via command line in
MESI_Three_Level.

Change-Id: Ie2a7f74790ed4c81c408857eccc2b439c60627f5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24255
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-17 14:38:08 +00:00
Timothy Hayes
e4c1fc318a misc: add Arm build_opts for MESI_Three_Level and MOESI_hammer
Change-Id: I0d1c5671efdd3cb2041805ab615cdff76d3a5e8a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24254
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-01-17 14:38:08 +00:00
Chun-Chen TK Hsu
4c071c4e0d util: Add fastmodel in valid tag list
The "fastmodel" tag has been used since 2019-08-22 so it should be an
valid tag in commit header.

Change-Id: I0032deaabc94e5896851da9afc28e1b1a699fed3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23923
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-16 16:53:24 +00:00
Gabe Black
aedaa1994e arm: A couple small fixes for the arm64 bootloader makefile.
First, remove a deprecated flag that gcc no longer recognizes.

Second, disable suffix based implicit makefile rules. These, in
combination with the %.o: boot.S rule, were tricking make into deleting
it's own makefile. How, you might ask?

make wants to update its makefile, since that's a thing it does
automatically. This is useful if you, for instance, have computed
header dependencies.

make decides it can make a file called "makefile" from a file called
"makefile.o" by doing a linking step.

make decides it can make makefile.o from boot.S from the %.o: boot.S
rule, which it does.

It then attempts to link makefile.o into makefile, but that fails
because it lacks a "main" function since it's using a built in rule
which doesn't know not to expect main. The makefile is clobbered in the
process.

make then deletes makefile.o because it was an implicit target,
eliminating all the evidence.

Change-Id: Ib0dfc333dc554caf5772dd8468dba6ba821f98ac
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24329
Reviewed-by: Chun-Chen TK Hsu <chunchenhsu@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-16 00:08:14 +00:00
Bobby R. Bruce
703884c0fe tests: Renaming tests to include dash between words
In `gem/hello_se/test_hello_se.py`, test suites were being generated
with no space between the word "test" and the test name. A dash has now
been added to make this a more readable.

Change-Id: I9d115a5941cc28af5476175fcbf2bd6940920291
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23025
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-01-15 21:05:09 +00:00
Bobby R. Bruce
6e9bc2bdc7 tests: Migrated old quick/se/00.hello tests
Migrated old quick/se/00.hello tests over to the new testing frame work
(i.e., that executed via `./tests/main.py run`). These fail, so they are
currently being ignored.

These tests now pull from the http://dist.gem5.org cloud storage.

Change-Id: Iff94cce53655bc629a3deb1e11d8d194824751d4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23024
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2020-01-15 20:38:55 +00:00
Adrian Herrera
5698c2b52d arch-arm: ELIsInHost, check VHE and SecEL2
This patch modifies ELIsInHost to correctly check for VHE
and Secure EL2 implementation.

Change-Id: I947dddfc6761794493fef3d59b3b35754d07ed6b
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24046
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-15 09:26:10 +00:00
Adrian Herrera
251cbd34b8 arch-arm: Virtualization Host Extensions checking
This patch adds Armv8.1-VHE checking. This is based on the bit
ID_AA64MMFR1_EL1.VH being 0b1.

Change-Id: Ia3f278c63fe1b5448a686db87a46853fc8b6bea5
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24045
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-15 09:26:10 +00:00
Adrian Herrera
226fa0cd94 system-arm: bigLITTLE with VExpress_GEM5_V2 in dtb
This patch adds targets in the device tree Makefile for using
bigLITTLE DTS with VExpress_GEM5_V2 platform.

Change-Id: I7a424a36c78a24b96224526aa112ac5d060f790b
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24083
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-14 14:29:21 +00:00
Daniel R. Carvalho
aa5140e26e mem-garnet: Use smart pointers for CrossbarSwitch's members
Use smart pointers for the pointers managed by CrossbarSwitch.

Change-Id: I71958c72cde5981d730aa3f68bba0ffbe4c2506f
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24244
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-14 07:04:57 +00:00
Gabe Black
80c5add40b x86: Stop clearing RAX for BIST in initCPU.
This doesn't actually change any behavior since RAX was being zeroed
anyway, but since we don't and almost certainly never will have a BIST
and the BIST is optional even in real hardware, we can drop it and
simplify initCPU a little further.

This reduces x86's initCPU function to just an invocation of
InitInterrupt's invoke.

Change-Id: I56b1aae2c1a738ef7ffabcf648dd7d0fb819d4e0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24187
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-01-14 02:19:19 +00:00