TheISA::initCPU is basically an ISA specific implementation of reset
logic on architectural state. As such, it only needs to be called if
we're not going to load a checkpoint, ie in initState.
Also, since the implementation was the same across all CPUs, this
change collapses all the individual implementations down into the base
CPU class.
Change-Id: Id68133fd7f31619c90bf7b3aad35ae20871acaa4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24189
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
The build was failing with:
/usr/bin/ld: unrecognized option '--as-needed -fuse-ld=gold'
and --verbose confirms that a single quoted CLI parameter was being
executed:
"-Wl,--as-needed -fuse-ld=gold"
This happened because at Ifb001786a66b0dd9b29865e39a5740313002f250
--as-needed was added, and because it is the second option to happen before
the following main.subst, it exposed the fact that the existing main.subst
was wrong, because it returns a string instead of the expected array.
Change-Id: I619d242d60fe9d27438638ac11c2b92512881f26
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24624
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This patch adds the reference 32KHz clock to VExpress_GEM5_Base derived
platforms. This is in preparation for supporting the SP805 Watchdog.
I/O voltage domain and platform clock domain coupling is transferred
to the __init__ method for correctness.
Change-Id: Ic743fd986793f1e43b75fa60260c9b43b2737763
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24204
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
A bug has been introduced with the new test url.
The line break should have used a backslash or (this is the recommended
way by PEP8) the implied line continuation via parenthesis.
This error was preventing the test to be loaded with the error message:
Exception thrown while loading
"/tmpfs/src/git/jenkins-gem5-prod/tests/gem5/m5_util/test_exit.py"
Ignoring all tests in this file.
and was not producing a failure (the test was not run: it was jus
ignored).
Change-Id: I0afe252d66d2f6546caaf5e7be811f34f88df82c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24625
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
All of the state being checkpointed would either be provided by the
config directly, or would be brought into the TLB through normal fill
operations. Having this state in the checkpoint complicates the
checkpoint and significantly decreases compatibility with other TLB
implementations, or even variations of the same TLB, for instance if
the size was changed.
Change-Id: I4ea079dd01ff18fbc458b3aaaf88519dbcfdd869
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24389
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
The helper is meant to check if the local binary is younger than the
remote binary (on gem5.org). If the call fails it is giving up and
it is just using the local regression (producing a warning).
The code is not handling the blocking behaviour of the connection:
simulaton might stall indefinitely
The patch is addressing this by providing a 10 seconds timeout.
Change-Id: I8f9c2e555c9a55d850a66d02f8e55f56ceda2ca3
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24531
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
So far lots of tests will download binaries inside the gem5 directory.
The path is also specific to the test being run.
This doesn't play well with an environment where gem5 is cloned from
scratch for every build, or if several gem5 are cloned in a single
machine.
Binaries will be automatically downloaded every time this happens.
This patch is adding a --bin-path option, so that it's possible to
setup a fixed directory with all pre-downloaded binaries.
By default it is set to None to preserve original behaviour.
Change-Id: I42fb25e3ce0a495c73672b15a097b1bd2607795c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24525
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Add an invalidation function to the AssociativeSet, so that entries
can be properly invalidated by also invalidating their replacement
data.
Both setInvalid and reset have been merged into invalidate to
indicate users that they are using an incorrect approach by
generating compilation errors, and to match CacheBlk's naming
convention.
Change-Id: I568076a3b5adda8b1311d9498b086c0dab457a14
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24529
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
First, remove a deprecated flag that gcc no longer recognizes.
Second, disable suffix based implicit makefile rules. These, in
combination with the %.o: boot.S rule, were tricking make into deleting
it's own makefile. How, you might ask?
make wants to update its makefile, since that's a thing it does
automatically. This is useful if you, for instance, have computed
header dependencies.
make decides it can make a file called "makefile" from a file called
"makefile.o" by doing a linking step.
make decides it can make makefile.o from boot.S from the %.o: boot.S
rule, which it does.
It then attempts to link makefile.o into makefile, but that fails
because it lacks a "main" function since it's using a built in rule
which doesn't know not to expect main. The makefile is clobbered in the
process.
make then deletes makefile.o because it was an implicit target,
eliminating all the evidence.
Change-Id: Ib0dfc333dc554caf5772dd8468dba6ba821f98ac
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24329
Reviewed-by: Chun-Chen TK Hsu <chunchenhsu@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This doesn't actually change any behavior since RAX was being zeroed
anyway, but since we don't and almost certainly never will have a BIST
and the BIST is optional even in real hardware, we can drop it and
simplify initCPU a little further.
This reduces x86's initCPU function to just an invocation of
InitInterrupt's invoke.
Change-Id: I56b1aae2c1a738ef7ffabcf648dd7d0fb819d4e0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24187
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
The initCPU function was setting a lot of values to zero or other
initial values, but that's something the ISA object can do as part of
its clear() method. This gets rid of a lot of code that was
individually zeroing registers, and also centralizes responsibility
for those registers in the ISA.
Change-Id: Iafcffd3f9329c39f77009b38b1696f91c36c117e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24185
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
It is *not* true that a kernel is required in FS mode. For example,
in SPARC, gem5 is set up to run actual system firmware which will load
a kernel from the disk image. Other systems can run in a bare metal
mode where they also have no kernel.
If a configuration requires a kernel, it should check for it in C++
where there context lives, not globally in fs.py.
Change-Id: Ib094c29474c248f866bd08d4f975648a2c707a19
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24284
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This will let a function called with a GuestABI emulate the ...
mechanism available in C. To make that possible without the functions
knowing anything about the ABI and to follow C++'s (sensible)
templating and virtual function rules, you have to tell VarArgs what
types you might want to extract from it, unlike the pure ... varargs
style mechanism.
Also unlike ..., there is no mechanism in place to force the varargs
to appear last in the argument list. It will pick up the progress
through the arguments at the point it's reached, and will ignore any
later arguments. It would be possible to be more rigorous about this
by changing the callFrom templates, but the overhead in complexity
is probably not worth it.
Also, retrieving arguments through a VarArgs happens live, meaning at
the point that the argument is asked for. If the ThreadContext or
memory the argument lives in is modified before that point, the
retrieved value will reflect that modification and not what the
function was originally called with. Care should be taken so that this
doesn't cause corrupted arguments.
Finally, this mechansim (and the Guest ABI mechanism in general) is
complex and should have tests written for it. That should be possible
since ThreadContext is forward declared and so the test can say it
works however it wants or even ignore it completely. If that changes
in the future, we may need a mock ThreadContext implementation.
Jira Issue: https://gem5.atlassian.net/browse/GEM5-187
Change-Id: I37484b50a3e8c0d259d9590e32fecbb5f76670c1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23195
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
The default constructor of the micropc enabled generic PCState class
set the next micropc to 0, when the non-default constructor and at
least the x86 initCPU utility function set it to 1. This makes more
sense since either the micropc doesn't matter as a concept if the
instruction isn't microcoded, or, unless redirected by a micropc
branch, you're going to want to execute the next microop and not just
repeat the first one.
Change-Id: I418ea986a071453563c4c8aad4fc4eb4f7beb641
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24184
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
VExpress_GEM5_Base states that its memory map is based on
CoreTile Express A15x2 A7x3, while the model used for the
Daughterboard Configuration Controller (DCC) is based on
Coretile Express A15x2.
These two daughterboard specifications differ in both on-chip
memory map and DCC clocks as of the TRMs.
This patch makes the reference consistent to Coretile Express
A15x2 and adds several non-confidential references to aid in
understanding the platform and adding new peripherals.
Change-Id: Ia55e7362bdc9ed6509f8eff4cbd7eb38e538d774
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24203
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Previously the `GTestExitLogger.log` function utilized GTest's
`ADD_FAILURE_AT` macro. This meant, whenever `GTestExitLogger.log` were
called, the calling test would be fail. This is problematic when
trying to test code we expect to fail (i.e., when testing the error
handling code is working correctly). Therefore, the `log` function now
writes to stderr.
The `GTestExitLogger` class is used by the `panic` and `fatal` loggers
when running GTests. Instead of callnig `exit(1)` they throw a GTest
exception, which can be captured in a test using
`EXPECT_ANY_THROW(expection_thrower())`. Catching and verifying error
logs can be done via:
```
testing::internal::CaptureStderr();
/*
* "exception_thrower()" is a method we'd expect to call `fatal` or
* `panic`, and therefore exit the simulation with a non-zero exit
* code. When running via GTest, an exception is thrown instead.
*/
EXPECT_ANY_THROW(exception_thrower());
EXPECT_EQ("<error message>", testing::internal::GetCapturedStderr()));
```
Change-Id: I84a5f86bc573668d3dd5b40f626b43108dddb8e9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23983
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
amo.hh was using several non-default definitions including
std::function, uint8_t, and std::array without including any headers
at all, and instead apparently relying on those having already been
brought in by an earlier include.
This change adds those includes explicitly.
Change-Id: I92166ff581e74bd705e10fd4fa454df179ae1a97
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24183
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Previously, when `tests/main.py run` was executed all the tests found
were run. It is now necessary to ignore some test suites as they fail.
Therefore, `gem5/suite.py` has been updated to read from `gem5/.testignore`
(if present). This file contains a list of all the test suites which are to
be ignored.
Change-Id: I699ea662b701d82199980084261496f24b13d340
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23023
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
