Commit Graph

12617 Commits

Author SHA1 Message Date
Gabe Black
52f5cd2f67 test: Fix unittest cprintftime's build.
This test, which measures the performance of cprintf vs. sprintf, was
missing a couple of includes which were needed for the alarm() and
signal() functions, as well as the SIGALRM constant.

Also, it was using %#x to print the value of a pointer which gcc
complained about when compiling sprintf. This is fixed by changing that
format specifier to %p, the specifier to use when printing pointers.
Apparently either the implicit conversion to an integer value (which %#x
expects) or the size of the type it was converted to weren't good enough
for gcc any more.

Change-Id: I8eca3479bef2c2fa79f8ef4881bb3ff35d7c54ca
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33897
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-01 21:53:42 +00:00
Gabe Black
e2fc29076a test: Remove refcnttest from the unittest SConscript.
The test itself was removed, but it was left in the SConscript. If you
tell scons to build everything in that directory, it will try to build
that test and fail.

Change-Id: I1e3923b0de12e891f53dab6f4e6e3e2b6975dc45
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33896
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-01 21:53:28 +00:00
Bobby R. Bruce
fd7d48ac19 arch-gcn3: Added missing header to hsa_driver.cc
`TypedBufferArg`, used in `src/dev/hsa/hsa_driver.cc` is defined in
`src/sim/syscall_emul_buf.hh` yet was not included. This commit adds
this missing header.

Change-Id: I3239a097eb71b6ebdad045eab6525a888a970f08
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33816
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-01 18:52:13 +00:00
Daniel R. Carvalho
79e83c7d95 mem-cache: Fix copy ellision on base compressor
Newer compiler versions have a problem with this move as
it prevents copy elision.

Change-Id: I802703df12e171d6a377b673d0ad7e202456b516
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33835
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-01 06:29:10 +00:00
Nikos Nikoleris
73fcbe4d6d arch: Remove unused variable pcbb from ThreadInfo
Change-Id: Ib9e46934f1613c98758662cba26a46fcc2a76146
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33776
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-01 06:25:28 +00:00
Sampad Mohapatra
9d8229c0f1 mem-ruby: Change request to response in MOESI_AMD_Base-dir.sm
The responseToDMA MessageBuffer in MOESI_AMD_Base-dir.sm
transmits both data and acks, but it's vnet_type is currently
set as request. This should be changed to response.

Signed-off-by: Sampad Mohapatra <sampad.mohapatra@gmail.com>
Change-Id: I0eb9e8fc8e25111849605a710a5150ce5fc3b83b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33755
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 22:54:31 +00:00
Daniel R. Carvalho
c0d67b2263 mem-cache: Use cache's max CR on perfect compressor
Use cache's max_compression_ratio to setup the max_compression_ratio
of the PerfectCompressor.

Change-Id: Ib44aa61975fb2cc52f27f64a86c9df9c5531aa1a
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33387
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
8626fe101d mem-cache: Explicitly define threshold of BDI's sub-compressors
Allow all sub-compressors of BDI to be successful as long as
they are able to compress. Then, BDI's actual size threshold
acts as the cutting point.

This situation arises on any multi compressor; yet, generalizing
this assumption might be too bold.

Change-Id: Iec5057d16d4a7ba5fb573133a30ea10869bd67e0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33386
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
605a0917bb mem-cache: Make compression size threshold a percentage
By changing the parameter into a percentage, changing the block
size will automatically reconfigure the size threshold. Also,
change the default percentage to 50% to avoid storing blocks
unlikely to co-allocate in compressed format.

Change-Id: I1458f19db39becc2d40c00269132fea01770016f
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33385
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
bc92a06cf5 mem-cache: Add stats for failed compressions
Add statistics to keep track of the number of times compression
has failed to provide blocks whose compressed size passes the
size threshold.

Also, update the compressed data's size if compression fails.

Change-Id: If3479572bf114f07911238c602ffef3a90b6a931
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33384
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
53ef7c1e6c mem-cache: Handle zero sizes on compression
The size can be zero in special occasions, which would
generate divisions by zero. This patch expands the
stats to support them. It also fixes the compression
factor calculation in the Multi compressor.

As a side effect, now that zero sizes are handled, allow
the Zero compressor to generate it.

Change-Id: I9f7dee76576b09fdc9bef3e1f3f89be3726dcbd9
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33383
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
58c7fc72d3 mem-cache: Add an extra decomp lat to multi compressor
There is extra hardware required when dealing with multi
compressors. As such, add a parameter to allowing increasing
their decompression latency to account for any extra delay.

Change-Id: I153e4c5ab6927ac092e2ebd767fe88974597bb20
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33382
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
99a8c5a27a mem-cache: Store BDI's encoding in tags
According to the original paper the compressors' encodings are
stored in the tag-store (Storage cost analysis section).

Change-Id: I4c34f86022eea6d1ba0ae29dd74d5714bbad367a
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33381
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
35f77329e8 mem-cache: Add encoding bits to the data of multi compressors
When compressing using a multi-compressor, one must be able to
identify which sub-compressor should be used to decompress data.
This can be achieved by either adding encoding bits to block's
tag or data entry.

It was previously assumed that these encoding bits would be added
to the tag, but now make it a parameter that defaults to the data
entry.

Change-Id: Id322425e7a6ad59cb2ec7a4167a43de4c55c482c
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33380
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
de94a29f85 mem-cache: Standardize data parsing in compressors
The compressors are not able to process a whole line at once,
so they must divide it into multiple same-sized chunks. This
patch makes the base compressor responsible for this division,
so that the derived classes are mostly agnostic to this
translation.

This change has been coupled with a change of the signature
of the public compress() to avoid introducing a temporary
function rename. Previously, this function did not return
the compressed data, under the assumption that everything
related to the compressed data would be handled by the
compressor. However, sometimes the units using the compressor
could need to know or store the compressed data.

For example, when sharing dictionaries the compressed data
must be checked to determine if two blocks can co-allocate
(DISH, Panda et al. 2016).

Change-Id: Id8dbf68936b1457ca8292cc0a852b0f0a2eeeb51
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33379
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
3fc4c0a415 mem-cache: Allow inheriting from DitionaryCompressor's comp data
Previously either the compression data was the one declared within
DictionaryCompressor, or the derived class would have to override
the compress() to use a derived compression data.

With this change, the instantiation can be overridden, and thus
any derived class can choose the compression data pointer type
they need to use.

Change-Id: I387936265a3de6785a6096c7a6bd21774202b1c7
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33378
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
8bb0e3749b mem-cache: Upgrade Compressor::Multi's stats
Use new style stats API for Compressor::Multi's stats.

Change-Id: Ia0313704cae4e7bd6bc675c71ea75b42a8e542f2
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33377
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
c85c793499 mem-cache: Upgrade BaseDictionaryCompressor's stats
Upgrade this compressor's stats to match current stats API.

Change-Id: I1cb69230f8deca053bc860cedafc9e6e78446df7
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33376
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
0658b53e93 mem-cache: Fix RepeatedQwords compressor
This compressor does not allocate dictionary entries when there
is a match. This was causing the compressor to always fail.

Change-Id: I50eb56fa284854f3ee87f33af2c6e0a5c5248d7c
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33375
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
9e7dbd0544 mem-cache: Fix integer promotion of mask
When applying the bitwise not to a short integer the compiler
automatically promotes it to an integer. For example, if a 8-bit
mask=0xFF, and the compiler decides to promote the mask to 32-bit
to apply the bitwise not, ~mask=0xFFFFFF00, which will yield wrong
results for popcount(): expected=0, got=24.

Change-Id: I95efba5532c27ca004ff6947d4b51a8a14f09741
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33374
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Kyle Roarty
b00b986353 misc: Use VPtr in hsa_driver.cc
This change updates HSADriver::allocateQueue to take in a ThreadContext
pointer as opposed to a PortProxy ref. This allows the TypedBufferArg
to be replaced with VPtr.

This also fixes building GCN3_X86

Change-Id: I1fea26b10c7344daf54a0cb05337e961f834a5fd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33655
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:44:11 +00:00
eavivi
9547cd285c mem: convert base prefetcher and queued to new style stats
Base and Queued inside src/mem/cache/prefetch converted

Change-Id: I3d5907b58efefc4d8522b89f073507f2548bff2f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33475
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 16:36:53 +00:00
Nathanael Premillieu
82f881255d base: avoid recreating socket at each call to listen()
A new socket was created each time listen() is called,
which is problematic when the bind or listen operation
on it are not successful (mostly because the associated port is
already in use). It can lead gem5 to open too many files and crash
for multicores configurations, a socket being created
for remote GDB for each core. The other way to deal with
this problem would be to close the socket in the case the
function return false. But I find the proposed solution
simpler.

Change-Id: I848955a10c89e1da033bf773c83556a5dc5ef9a2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32994
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 07:36:24 +00:00
Kyle Roarty
6276d4ea6c misc: Fix db_offset calculation
db_offset used to be calculated through pointer arithmetic. Pointer
arithmetic increments the address by the size of the data type the
pointer is pointing at. In the previous db_offset calculation, that
was a uint32_t, which means the input was multiplied by 4, which is
sizeof(uint32_t)

This patch multiplies the input value by sizeof(uint32_t) before
assigning it to db_offset.

Change-Id: I9042560303ae6b8b1054b98e9a16a9da27843bb2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32678
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-29 01:49:49 +00:00
Jason Lowe-Power
bbb32ca1ef base: Use system libelf instead of ext
The only change needed is to remove EM_SPARC64, which from what I can
tell was removed from elf.h in 1998.

https://sources.debian.org/src/glibc/2.24-11+deb9u1/ChangeLog.8/#L6134

Change-Id: I0dd7e23ea44b19c2ebd9c6eff7cbaedfe69d821b
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33317
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabeblack@google.com>
2020-08-28 19:54:31 +00:00
Giacomo Travaglini
8fceff60c4 arch-arm: Fix coding style in addressTranslation methods
armFault -> arm_fault

Change-Id: I6263b105f8757b34dd15a06b16abe7289073614d
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33434
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-28 14:05:59 +00:00
Giacomo Travaglini
b50d61fb9f arch-arm: Check if PAC is implemented before executing insts
If Armv8.3-PAuth (PAC) extension is not supported, most instrucions
will trigger an Undefined Instruction fault; except for a group of
them living in the HINT space; those should be treated as NOP.

Change-Id: Idec920ed15e0310ec9132a3cb3701cdb7e7cf9d1
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33455
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-28 09:40:21 +00:00
Giacomo Travaglini
6d15745532 arch-arm: Introduce HavePACExt helper
This will check for presence of pointer authentication extension.
According to the reference manual, Pointer authentication is
implemented if the value of at least one of

ID_AA64ISAR1_EL1.{APA, API, GPA, GPI}

is not 0b0000.

Change-Id: I4e98e65758e8edc953794e5b618d2c6c3f6000ae
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33454
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-28 09:40:21 +00:00
Andreas Sandberg
d6a37c4660 python: Add support for introspecting scalar stats
This change adds a wrapper for the ScalarInfo stat type to enable
introspection of scalar stats from Python. Due to the slightly
confusing use of proxy objects in the stat system, PyBind11 fails to
automatically cast to the right wrapper type. This is worked around in
the by explicitly casting to the relevant type's Python wrapper.

To make the interface more Python-friendly, this change also changes
the semantics of resolveStat to raise an exception if the stat can't
be found.

Change-Id: If1fc6fe238fc9d69d4e22369a4988a06407d2f7c
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33176
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-28 09:27:58 +00:00
Gabe Black
cb58aafb99 cpu: Factor the page size out of the decode cache.
There isn't anything special about using the page size, and it creates
an artificial dependence on the ISA. Instead of being based on pages,
the cache is now based on "chunks" who's size is a template parameter.
It defaults to 4K which is a common page size, but it can be tuned
arbitrarily if necessary.

Some unnecessary includes have been trimmed out as well.

Change-Id: I9fe59a5668d702433a800884fbfbdce20e0ade97
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33204
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-28 07:21:07 +00:00
Gabe Black
1d755b4ba1 misc: Clean up usage of arch/isa_traits.hh.
isa_traits.hh used to have much more in it, but now it only has
PageShift, PageBytes, and (for now) the guest endianness. These values
should only be retrieved from the System class generally speaking, so
only the system class should include arch/isa_traits.hh.

Some gpu compute related files need PageBytes or PageShift. Even though
those files don't advertise their ISA dependence, they are tied to x86.
In those files, they can include arch/x86/isa_traits.hh.

The only other file which legitimately needs arch/isa_traits.hh is the
decoder cache since it uses PageBytes to size an array.

Change-Id: I12686368715623e3140a68a7027c136bd52567b1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33203
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-28 07:20:58 +00:00
Gabe Black
1e18de8270 sparc: Minor cleanup in isa_traits.hh.
Remove unnecessary includes, and an unnecessary/unimplemented function
prototype.

Change-Id: I2230c1ec62734d918f0f6af6f4c1e1a64f25f812
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33201
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-28 03:29:43 +00:00
Ian Jiang
5e1bc74efe arch-riscv: Fix disassembling of jalr
The 'jalr' instruction of 'format Jump' should have an immediate as
offset, and the Rd register could not be always omitted. This patch
fixes the problem.

Example output:
  jalr ra, -168(ra)
  jalr zero, 0(ra)
  jalr ra, 0(a5)

Note that this does not apply to the other two instructions of the
same format: 'c.jr' and 'c.jalr'.

Change-Id: Ia656c2e8bfafd243bfec221ac291190a84684929
Signed-off-by: Ian Jiang <ianjiang.ict@gmail.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33155
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-28 00:22:00 +00:00
Gabe Black
6ff5fc5c1c riscv: Remove unnecessary includes from arch/riscv/isa_traits.hh.
Change-Id: Iff3e840c5b67fa23ebead337abf323e7add2e6db
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33200
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-28 00:03:25 +00:00
Gabe Black
a62b32820e power: Tidy up isa_traits.hh and delete the VAddr class.
The VAddr class wasn't used and was just a copy (with style fixes) of
the Alpha version.

Delete unused constants in isa_traits.hh, and remove unnecessary
includes. Replace MachineBytes with sizeof(uint32_t) in
arch/power/process.cc.

Change-Id: Ia4862448c43b2dd07078b1ebbbbfda4636343730
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33199
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-28 00:03:12 +00:00
Kyle Roarty
0983929a24 arch-gcn3: Update LmReqsInPipe in atomic flats when execMask=0
In flat instructions, wrLmReqsInPipe/rdLmReqsInPipe are decremented
in the calcAddr() function. However, the calcAddr() function is only
called when execMask != 0.

This patch adds in statements to decrement wrLmReqsInPipe and
rdLmReqsInPipe in all implemented atomic flats when execMask is 0.

This fixes a scenario where vector local memory and flat instructions
are unable to execute due to LocalMemPipeline::isLMReqFIFOWrRdy
always returning false in ScheduleStage::dispatchReady after too many
atomic flats execute with execMask = 0

Change-Id: I081cfd3faf74bbfcf0728445e7160fa2a76a6a7e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32614
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-27 20:46:28 +00:00
Tony Gutierrez
94000aefe6 gpu-compute: Create CU's ports in the standard way
The CU would initialize its ports in getMasterPort(), which
is not desirable as getMasterPort() may be called several
times for the same port. This can lead to a fatal if the CU
expects to only create a single port of a given type, and may
lead to other issues where stat names are duplicated.

This change instantiates and initializes the CU's ports in the
CU constructor using the CU params.

The index field is also removed from the CU's ports because the
base class already has an ID field, which will be set to the
default value in the base class's constructor for scalar ports.

It doesn't make sense for scalar port's to take an index because
they are scalar, so we let the base class initialize the ID to
the invalid port ID.

Change-Id: Id18386f5f53800a6447d968380676d8fd9bac9df
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32836
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-27 16:31:46 +00:00
Yu-hsin Wang
a7530f798b systemc: Send response to TLM side if a packet does not need response
A completed TLM transaction includes request and response parts.
Currently, if a gem5 packet does not need a reponse, the bridge would not
send BEGIN_RESP to its upstream. It causes stuck on TLM side.

To fix this problem, the bridge should send BEGIN_RESP by itself in this
case.

Change-Id: I318dec21bc3f291693715c0d70bc624addf05076
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32735
Reviewed-by: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
2020-08-27 00:15:26 +00:00
Gabe Black
d892d39f33 sim: Fix up the selectFunc syscall to work with g++ 10.2.
This is no longer willing to implicitly cast between the locally defined
Linux::fd_set type and the system fd_set type. That's pretty reasonable
since those types are really independent of one another, and we
shouldn't be using them interchangeably in the first place. That's a
pre-existing condition though, and I just want to get the existing code
to compile for now.

Change-Id: I41d5f3695dfe5f0e406d074d31d13c6e3282df64
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33415
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-26 20:16:00 +00:00
Shivani Parekh
315a8c2c9a systemc,sim: Update port terminology
Change-Id: Iaeafe94245e383fcb1146c99c893fd56fe9bb636
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32316
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-26 16:48:13 +00:00
Shivani Parekh
05157b6986 dev: Update port terminology
Change-Id: I48bd6718471f034f7c3226279efe7ada0d9c81e9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32315
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-26 16:48:13 +00:00
Shivani Parekh
cf43bc3c8b mem: Update port terminology
Change-Id: Ib4fc8cad7139d4971e74930295a69e576f6da3cf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32314
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-26 16:48:13 +00:00
Emily Brickey
6333e914d3 gpu-compute: update port terminology
Change-Id: I3121c4afb1e137aebe09c1d694e9484844d02b9b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32313
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Matt Poremba <chesp3@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-26 16:48:13 +00:00
Emily Brickey
1447017039 cpu: update port terminology
Change-Id: I891e7a74683c1775c75a62454fcfdecb7511b7e9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32312
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2020-08-26 16:48:13 +00:00
Emily Brickey
34ee6af3e8 arch: update port terminology
Change-Id: Ifcf90534d8e5ff5fc68538ec87dc541517ea404d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32311
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-26 16:48:13 +00:00
Emily Brickey
c02599a70d learning-gem5: update port terminology
Change-Id: I0ca705cf93396b5c34a0ac4dce30411c5c866733
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32310
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-26 16:48:13 +00:00
Emily Brickey
4810c36401 misc: Updated port classes & refs to remove slaveBind()/UnBind()
Change-Id: I9106397b8816d8148dd916510bbcf65ed499d303
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32309
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-26 16:48:13 +00:00
Shivani
e1f6d22234 mem: Deprecate SlavePort and MasterPort classes
After this change, if you use these classes or inherit from these
classes, the compiler will now give you a warning that these names are
deprecated. Instead, you should use ResponsePort and RequestPort,
respectively.

This patch simply deprecates these names. The following patches will
convert all of the code in gem5 to use these new names. The first step
is converting the class names and the uses of these classes, then we
will update the variable names to be more precise as well.

Change-Id: I5e6e90b2916df4dbfccdaabe97423f377a1f6e3f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32308
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-26 16:48:13 +00:00
Jason Lowe-Power
b1245973be python: Add DeprecatedParam type
There are times when we need to change the name of parameter, but this
breaks the external-facing python API used in configuration files. Using
this "type" for a parameter will warn users that they are using the old
name, but allow for backwards compatibility.

Declaring a SimObject parameter of type `DeprecatedParam` allows the
python configuration files to use the old name transparently. This
leverages some of the SimObject magic to remember the names of
deprecated parameters and the DeprecatedParam object stores the
"translation" from old name to new name.

This has been tested with Ports, "normal" parameters, and SimObject
parameters. It has not been tested with checkpointing as there are no
checkpointing tests in gem5 right now. The testing was manually adding
some deprecated params and checking that config scripts still run
correctly that use the old, deprecated, variables.

Change-Id: I0465a748c08a24278d6b1a9d9ee1bcd67baa5b13
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31954
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-26 16:09:33 +00:00
Giacomo Travaglini
df639a1c28 arch-arm: Rewrite addressTranslation to use BitUnions
Change-Id: I48877d026213a0dec8b8f96deef59bdbc9a40564
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33356
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-26 13:56:54 +00:00