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Bobby R. Bruce
31cd81fdec misc: Updated the RELEASE-NOTES and version number 
Updated the RELEASE-NOTES.md and version number for the v20.1.0.5 hotfix
release.

Change-Id: I137a12325137799b9b1f98fe67ac55bfab49cd91
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43145
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-03-17 19:58:48 +00:00
Giacomo Travaglini
eb3554e0e9 configs: Use integer division in MESI_Three_Level_HTM.py 
num_cpus_per_cluster and num_l2caches_per_cluster need to be integer
as we are iterating over those variables

Cherry-picked from:
https://gem5-review.googlesource.com/c/public/gem5/+/42883

Change-Id: Ifc1f9cf06b36044289a0ba5e54666f1af2587fca
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43144
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-03-17 19:58:48 +00:00
Giacomo Travaglini
1479ad9ef0 arch-arm: Fix atomics permission checks in TLB 
For stage 2 translations, atomic accesses were not checking the
access permission bits in the page table descriptors, and were
instead wrongly using the nature of the request itself
(r/w booleans).

Cherry-picked from:
https://gem5-review.googlesource.com/c/public/gem5/+/42073

Change-Id: I919a08b690287b03426d9124a61887e521f47823
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43143
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-03-17 19:58:48 +00:00
Andreas Sandberg
9ea38f7147 python: Fix incorrect prefixes is m5.utils.convert 
The conversion functions incorrectly assumed that kibibytes are 'kiB'
rather than 'KiB' (correct).

Cherry-picked from:
https://gem5-review.googlesource.com/c/public/gem5/+/39375

Change-Id: Ia9409218c37284514fc4fabdabf327641db8cefc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43146
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-03-17 19:58:48 +00:00
Bobby R. Bruce
2373934b82 misc: Updated the RELEASE-NOTES and version number 
Updated the RELEASE-NOTES.md and version number for the v20.1.0.4
hotfix release.

Change-Id: Iaefed86cb176c3adcd66d101ac3155d30528b025
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41713
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-02-22 14:03:04 -08:00
Hoa Nguyen
2c048bb097 scons: Fixing build errors with scons 4.0.1 and 4.1.0 
SCons failed to find m5 module while loading m5.util.terminal
from site_scons/gem5_scons/util.py.

This results in the current version of gem5 stable failed to
build with scons 4.0.1 and 4.1.0.

The nature of the bug and the explaination for the fix can be
found here,
https://gem5-review.googlesource.com/c/public/gem5/+/38616

Jira: https://gem5.atlassian.net/browse/GEM5-916

Change-Id: I3817f39ebc3021fb6fc89bcd09a96999f8ca2841
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41594
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-02-22 21:52:57 +00:00
Bobby R. Bruce
cd21b5a551 misc: Updated the RELEASE-NOTES and version number 
Updated the RELEASE-NOTES.md and version number for the v20.1.0.3
hotfix release.

Change-Id: I95ab84ea259f5e0529ebaa32be65d9a14370f219
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40435
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-02-03 19:08:56 +00:00
Adrian Herrera
debec23ea4 arch-arm: don't expose FEAT_VHE by default 
If FEAT_VHE is implemented and Linux boots in EL2, it programs itself
to operate in EL2. This causes a later boot stall as explained in
https://gem5.atlassian.net/browse/GEM5-901.
We provide a parameter "have_vhe" to enable FEAT_VHE on demand. This is
disabled by default until fixed. This avoids users stalling on the common
case of booting Linux without a hypervisor.

Change-Id: I3ee7be1ca59afc0cbbda59fb3aad4c897c06405f
Signed-off-by: Adrian Herrera <adrian.herrera@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39695
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2021-02-02 09:18:00 +00:00
Bobby R. Bruce
0d703041fc misc: Updated the RELEASE-NOTES and version number 
Updated the RELEASE-NOTES.md and version number for the v20.1.0.2
hotfix release.

Change-Id: Ibb6b62a36bd1f9084f7d8311ff1f94b8564dbe9b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/37435
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-11-16 19:21:27 +00:00
Hoa Nguyen
14045cb395 cpu,stats: Fix incorrect stat names of ThreadStateStats 
Previously, ThreadStateStats uses ThreadState::threadId() to
determine the name of the stats. However, in the ThreadState
constructor, ThreadStateStats is initialized before ThreadState
is intialized. As a result, the name of ThreadStateStats has
a wrong ThreadID.

This commit uses ThreadID instead of ThreadState to determine
the name of the stats.

This causes a name collision between ThreadStateStats and
ExecContextStats as both have the name of "thread_[tid]".
Ideally, those stats should be merged to the BaseSimpleCPU.
However, both ThreadStateStats and ExecContextStats have
a stat named numInsts. So, for now, ExecContextStats will
have a name of "exec_context.thread_[tid]", while ThreadStateStats
keeps its name.

Change-Id: If9a21549f98bd6e3ce6dc29bdf183e8fd5f51a67
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/37455
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-11-14 01:58:56 +00:00
Daniel R. Carvalho
8728c26c7f configs: Fix MemorySize division 
The memory size is expected to be an integer.

Jira: https://gem5.atlassian.net/browse/GEM5-806

Change-Id: I44b2d423a3478d2598950779222151f09970cbd8
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/37255
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com>
 2020-11-10 19:47:49 +00:00
Bobby R. Bruce
a265891e87 misc: Updated the RELEASE-NOTES and version number 
Updated the RELEASE-NOTES.md and version number for the v20.1.0.1
hot-fix.

Change-Id: I51f7ba6f1178a2d8e80488ed2184b8735c2234a2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/37116
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-11-06 19:46:42 +00:00
jiemingyin
4a435b982b mem-garnet: Fix garnet network interface stats 
Fixing a bug in garnet network interface where flit source delay is
computed using both tick and cycle.

Change-Id: If21a985f371a818611d13e9cd5ce344dbcf5fb2b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/36416
Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com>
Maintainer: Matthew Poremba <matthew.poremba@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/37115
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jieming Yin <bjm419@gmail.com>
 2020-11-06 19:46:42 +00:00
Bobby R. Bruce
090fa08c14 misc: Updated version to 20.1.0.0 
Change-Id: Ic7a37581c58caa354eeecab051122116177d0721
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35456
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-10-01 03:05:49 +00:00
Bobby R. Bruce
2a4357bfd0 scons: Removed -Werror for the gem5 20.1 release 
While gem5 compiles on all our supported compilers, removing the -Werror
flag on the stable branch ensures that, as new compilers are released
with stricter warnings, gem5 remains compilable.

Change-Id: I9a356472dc4d729a3fef9f1455814c900103bd66
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35455
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-10-01 03:05:49 +00:00
Bobby R. Bruce
a069ce5050 misc: Updated CONTRIBUTING.md: 'master' -> 'stable' 
The `master` branch is now the `stable` branch. This commit updates
CONTRIBUTING.md accordingly.

Change-Id: Ic5231eda336520e8a7260efac6474b4f0af08c37
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35457
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-10-01 03:05:32 +00:00
Jason Lowe-Power
aae8bd9a66 misc: Add release notes for 20.1 
Change-Id: I011ff987e222326dd7f0787c41043578b52b236a
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35375
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-10-01 00:40:05 +00:00
Sungkeun Kim
65338a63d2 sim: Adding missing argument of panic function 
panic function call in panicFsOnlyPseudoInst (src/sim/pseudo_inst.cc) needs to be invoked with argument (name).

Jira Issue: https://gem5.atlassian.net/jira/software/c/projects/GEM5/issues/GEM5-786?filter=allissues

Change-Id: Iecacab7b9e0383373b69e9b790fa822d173d29c3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35040
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-30 22:14:51 +00:00
Nikos Nikoleris
7c9ff611d6 ext: Disable range-loop-analysis warnings for pybind11 
Change-Id: I9d9e118c1c70c2f6b11260fff31ecd763e491115
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35296
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-30 22:14:42 +00:00
Bobby R. Bruce
c79dcaf498 tests,misc: Updated TestLib and boot-tests for gzipped imgs 
In efforts to reduce storage costs and download times, the images hosted
by us have been gzipped. The TestLib framework has therefore been
extended to decompress gzipped files after download.

The x86-boot-tests are, at present, the only tests which use the gem5
images. These tests have been updated to download the gzipped image.

Change-Id: I6b2dbe9472a604148834820db8ea70e91e94376f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35257
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-30 05:17:10 +00:00
Bobby R. Bruce
81779301d8 scons,python: Add warning for when python3-config is not used 
We cannot say for certain whether 'python-config' is python2 or python3,
but this patch will produce a warning if 'python3-config' is not used,
stating that support for python2 will be dropped in future releases of
gem5.

Change-Id: I114da359c8768071bf7dd7f2701aae85e3459678
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35256
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-29 17:52:15 +00:00
Bobby R. Bruce
e2460a5dab tests: Removing gem5/hello_se/ref/simerr 
This is not needed in any comparison we make. It was probably added in
error.

Change-Id: Ie771654f73d101d0ef90ca6e2864a7cb684b3919
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34996
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-29 17:52:15 +00:00
Bobby R. Bruce
5eb9cdd2c6 scons,python: Add python2-config to PYTHON_CONFIG 
PYTHON_CONFIG can be python2-config as well as python2.7-config.

Change-Id: I482cb922fcf26b37f67f2aca392e04968ca144bd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35255
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-29 17:52:15 +00:00
Bobby R. Bruce
16b2c029f5 scons,python: Prioritize Python3 for PYTHON_CONFIG 
Change-Id: I0ac4d90b93f2e0a9384216f759937f7b0aa23d41
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34899
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-29 17:52:15 +00:00
Bobby R. Bruce
b715c2d513 python: Flush the simulation stdout/stderr buffers 
Occasionally gem5's stdout/stderr, when run within the TestLib
framework, will be shuffled. This is resolved by flushing the
stdout/stderr buffer before and after simulation.

In addition to this, the verifier.py has been improved to remove
boilerplate gem5 code from the stdout comparison.

Change-Id: I04c8f9cee4475b8eab2f1ba9bb76bfa3cfcca6ec
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34995
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-29 17:52:15 +00:00
Timothy Hayes
d9d4203e04 arch-arm: Instantiate a single HTM checkpoint at ISA::startup 
Change-Id: I48cc71dce607233f025387379507bcd485943dde
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35016
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-29 09:16:28 +00:00
Timothy Hayes
5c83d8f74c cpu: Allow storing an invalid HTM checkpoint 
Commits 02745afd and f9b4e32 introduced a mechanism for creating checkpoint
objects for hardware transactional memory (HTM) and Arm TME. Because the
checkpoint object also contains the local UID of a transaction, it is
needed before any architectural checkpointing takes places. This caused
segfaults when running HTM codes.

This commit allows ISAs to allocate a checkpoint once at the beginning
of simulation.  In order to do that we need to remove the validity check
assertion; the cpt will become valid only after a first successfull
transaction start

Change-Id: I233d01805f8ab655131ed8cd6404950a2bf6fbc7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35015
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-29 09:16:28 +00:00
Nikos Nikoleris
55cbc64d1e mem: Fix some reference use in range loops 
This change fixes two cases of range loops, one where we can't use
lvalue reference, and one more where we have to use an lvalue
reference as we can't create a copy. In both cases clang would warn.

Change-Id: I760aa094af66be32a150bad37acc21d6fd512a65
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34776
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-28 22:38:11 +00:00
Gabe Black
4b63d5e7a8 mem: When loading an image directly in memory, use the right CL size. 
Some code was added fairly recently which would load a memory image
into a memory directly in order to make it easier to set up ROMs.
Unfortunately, that code accidentally used the image size instead of
the cache line size when setting up the port proxy which would actually
write the data. This happens to work when the image size is a power of
two since that's all the proxy checks for, but there's no guarantee
that every image will be sized that way.

This change instead looks into the system object, retrieves the cache
line size from it, and uses that to set up the port proxy.

Change-Id: I227ac475b855d9516e1feb881769e12ec4e7d598
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35155
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-26 01:16:40 +00:00
Matthew Poremba
873ceaded5 configs: Set kvm_map in DRAMInterface in Ruby.py 
The kvm_map parameter from AbstractMemory has been moved from MemCtrl
(formerly DRAMCtrl) to DRAMInterface. Assign it to DRAMInterface
instead.

Change-Id: I4508aefcf5eb859d9ffe05c81d85a1b84ee0a196
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35095
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-25 16:52:31 +00:00
Gabe Black
bcc797a2cb fastmodel: Update the IRIS ThreadContext base class. 
The syscall() method has been removed, and HTM related methods have
been added.

Change-Id: I796c1a554bfd4b1ee01a62c9c7ad403dd699cc0f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35038
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-24 20:08:13 +00:00
Gabe Black
76bceca2e1 arm,fastmodel: Update the VExpressFastModel to use ArmInterruptPins. 
The HDLCD device now uses an ArmInterruptPin instead of a GIC and
interrupt number parameter.

Change-Id: I31122e66a1c18f61592f3dca214ee057baad8f88
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35039
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-24 20:07:59 +00:00
Gabe Black
281afe2be0 fastmodel: Update for the isa_traits.hh changes. 
arch/arm/isa_traits.hh no longer has using namespace ArmISA, and also
no longer directly or indirectly provides interrupt number related
constants.

Change-Id: Ieda31d1db4f85632a555b2f72ee8bff0aa159eee
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35037
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-24 20:07:48 +00:00
Bobby R. Bruce
b45bbef206 tests,base: Fixed unittests for .fast 
unittests.fast, unittests.prof, and unittests.perf had failing tests due
to the stripping of asserts via compiler optimization. This patch alters
the unittests to skip these tests when TRACING_ON == 0.

Change-Id: I2d4ab795ecfc2c4556b5eb1877635409d0836ec6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34898
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-22 01:46:22 +00:00
Bobby R. Bruce
5a20525e75 util: Removed libelf-dev dep from Dockerfiles 
The libelf-dev dependency is no longer required in our Dockerfiles.

This reverts commit 0cf67fb362,
https://gem5-review.googlesource.com/c/public/gem5/+/33596.

The libelf-dev dependency has been kept for the "all_dependencies"
Dockerfiles.

The corresponding Docker images have been built and uploaded to:
https://gcr.io/gem5-test.

Change-Id: Iacbd8240f69d476ad3a649baaccb6b85fec2487c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34676
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-17 03:13:21 +00:00
Jason Lowe-Power
914d6af8a8 configs: Add special case in MemConfig 
SimpleMemory doesn't implement a full MemCtrl interface. Thus, like the
NVM and HMC memories, we need to add a special case to MemConfig.py. The
--mem-type command line option now works for SimpleMemory and all of the
DRAM interfaces (it does not work for the NVM interfaces, though).

Issue-on: https://gem5.atlassian.net/browse/GEM5-777

Change-Id: I6d60649215be324bdd2a104b1976752f936c960e
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34595
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-16 21:07:19 +00:00
Gabe Black
e5a3584df7 mem-ruby: Remove conditional includes based on THE_ISA in ruby. 
These were including instruction class definitions from x86 for some
reason. There was no code in those .cc files which actually used
anything from them, as evidenced by the fact that the GCN3_X86 build
still works. No other code in the file was conditionally compiled as of
today.

Change-Id: I3cef8348fb601dd7af67665cf64bbf514c91c3db
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34577
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-16 06:08:22 +00:00
Gabe Black
49a41da964 gpu: Fix a syntax error in X86GPUTLB.py. 
The recent changes which removed master/slave terminology also
accidentally deleted an "=", making the syntax in that file illegal.

Change-Id: I50aa945f0f66765db36775380b98a88caff23c13
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34576
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-16 06:08:14 +00:00
Gabe Black
15faee77ec arm: Use zero initialization for the BigRegVect types. 
These were being initialized with BigRegVect brv = {0}, which made the
compiler complain because there is internal structure. The first element
of the union is actually an array, and this was telling it to initialize
that array to scalar 0. It was warning about this which was breaking the
build.

Instead, use zero initlization like BigRegVect brv = {}. This
initializes the first element of the union to all zeroes, with all
padding bits initialized to zero as well.

This satisfies the compiler and avoids a build error.

Change-Id: I31e7a8730c538637ff2e0c7fb00a4e12ed05e074
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34575
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-16 06:08:02 +00:00
Bobby R. Bruce
b5850b69d1 cpu,misc: Revert problematic terminology renames in BaseCPU 
Due to gem5's use of duck-typing, we must termorarly revert the
terminology in BaseCPU back to master/slave to avoid issues.

This fixes https://gem5.atlassian.net/browse/GEM5-775.

Change-Id: Idf1cb99aa9568ee70943ebec96f27394d8167f8c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34495
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-15 16:01:32 +00:00
Jason Lowe-Power
90a6e80962 mem-ruby: Update port names in Ruby 
After the terminology update commit there were still many confusing
names in the Ruby ports. This changeset is a proposal for updating these
names.

For an example use case, see the following resources changeset.
https://gem5-review.googlesource.com/c/public/gem5-resources/+/34416

Change-Id: I01d4f24a70b300e39438ee147dfab7a8d674d5c7
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34417
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-15 00:25:01 +00:00
Jason Lowe-Power
4c9f77462f tests: Remove MIPS from Learning gem5 tests 
Change-Id: Iffd9f5da188cac26ac75a8109886c36789956959
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34415
Reviewed-by: mike upton <michaelupton@gmail.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-15 00:25:01 +00:00
Jason Lowe-Power
caabcf569d dev: Fix port name in x86 device 
Change-Id: I7704109287b9a1a09e51da3c62c29720631ce87e
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34435
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-14 23:11:43 +00:00
Giacomo Travaglini
dd9991dad0 arch-arm: Fix ArmISA namespace requirement for Arm KVM 
This is needed after:

https://gem5-review.googlesource.com/c/public/gem5/+/34155

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: I614b908a48145d8c2f5e8b8177448e3269f8dac9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34418
Reviewed-by: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-13 11:43:44 +00:00
Muhammad Sarmad Saeed
b2847f43c9 misc: Update documentation of SimObject related APIs 
Updated documentation of Drain, Serialize, Evnet queue and Simobject
APIs. Made some corrections to where the documentation was available
in the code but did not appear in the documentation.

Change-Id: I5254e87eb5663232e824bcd5592da0a04eba673b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31814
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-11 05:38:53 +00:00
Srikant Bharadwaj
7957b1c43b mem-garnet: Upgrade garnet version to 3.0 
This version of garnet includes HeteroGarnet which
supports heterogenous interconnect systems, flexible
router and link configurations, and better debugging
resources.
This patch changes the garnet directory structure
to not include the version number. The user will be
informed about the garnet version being used.

Change-Id: Id4763421528305193ae0cd10c159b385a9513553
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34259
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-11 05:38:09 +00:00
Jason Lowe-Power
1c3e411834 arch-arm: Initialize some cases of destReg 
Some compilers complained that this variable may be uninitialized. This
change initializes it to 0.

Change-Id: I201d75ba05ce49d13bbaf4d67e1c728ef704fdf0
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34335
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: mike upton <michaelupton@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-11 05:31:31 +00:00
Jason Lowe-Power
69e3e508c7 tests: Update x86 system.py for MemCtrl interface 
Change-Id: If4103b197720f74df70d0a24602e2b3715936826
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34315
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: mike upton <michaelupton@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-11 05:31:31 +00:00
Srikant Bharadwaj
28d41f213a mem-garnet: Allow empty vnet list for garnet network links 
An empty supporting_vnet list is the default and implies that
all vnets are supported. This removes the assert which requires
the list to have a minimum list size of 1.

Change-Id: I6710ba06041164bbd597d98e75374a26a1aa5655
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34258
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-11 02:00:13 +00:00
Srikant Bharadwaj
94f7736489 mem-garnet: Fix default value of network bridge 
Initializing the network bridge with NULL causes it to have
an class error when instatiating a link. The bridge is only
needed whne either a CDC or SerDes is enabled. This is handled
later during construction of the GarnetLink.

Change-Id: If19a21a6d9bf49449b9c390467d08d3422ae991a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34257
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-09-11 02:00:13 +00:00