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Author SHA1 Message Date
fzeder
cfbbecdaaf Merge pull request #177 from anaclara/master 
Adding metrics to dramSylva
 2017-08-15 19:08:54 +02:00
Ana Mativi
ec941b4301 Try to clone first with SSH, using HTTPS in case of failure. README updated 2017-08-15 18:29:04 +02:00
Ana Mativi
1ead5c0c32 Adding metrics to dramSylva 2017-08-15 15:56:35 +02:00
Éder F. Zulian
5b16c7caf5 Plot generation feature added to dramSylva 2017-08-15 12:43:33 +02:00
Éder F. Zulian
ba592e28e6 Add comments to dramSylva 2017-08-15 11:51:16 +02:00
Éder F. Zulian
f48c781c1f dramSylva gets num. of cores from proc filesystem 2017-08-14 10:41:17 +02:00
Éder F. Zulian
8be2ff4fd9 Simulation log collector script added to repo 2017-08-11 13:08:52 +02:00
Éder F. Zulian
ef741cf744 Comments added to the code 2017-08-08 14:37:08 +02:00
fzeder
c1e9949850 Merge pull request #176 from anaclara/master 
Postpone Refresh feature is only available for DDR3 currently
 2017-08-08 13:58:10 +02:00
Ana Mativi
76d985d3f5 Added fatal error if ControllerCoreEnableRefPostpone is enabled and memSpec is not DDR3 2017-08-08 13:26:20 +02:00
Ana Mativi
466fbab9ba loadMemSpec executes before loadMCConfig 2017-08-08 13:25:36 +02:00
Ana Mativi
e2e389f075 Adding myself as an author for RefreshManager 2017-08-08 13:21:02 +02:00
fzeder
462d4f5ebc Merge pull request #173 from anaclara/master 
Postpone Refresh Implementation.

This initial version supports DDR3 only.
 2017-08-08 10:13:42 +02:00
Ana Mativi
a4bd237418 Patch for Postpone Ref Implementation 2017-08-07 18:12:16 +02:00
Ana Mativi
a2d2bcb7ca Postpone Refresh Implementation 2017-07-28 17:30:56 +02:00
fzeder
9132e632c5 Merge pull request #171 from trancong/Simple_SMS 
SMS Fix on Iterator Invalidation
 2017-07-25 17:44:27 +02:00
Matthias Jung
5b7210a2d7 Improved FR_FCFS_GRP 2017-07-24 14:14:51 +02:00
Thanh C. Tran
273338b69d Merge branch 'master' into Simple_SMS 
* master:
  New FR_FCFS with read write grouping
  Small fix in the loadbar
 2017-07-22 01:29:46 +02:00
Matthias Jung
0c29d7a325 New FR_FCFS with read write grouping 2017-07-21 11:53:24 +03:00
Matthias Jung
7a30b9b34f Small fix in the loadbar 2017-07-21 10:39:39 +03:00
Thanh C. Tran
9ed0180895 Fix segmentation fault on wrong ranges 2017-07-19 19:06:53 +02:00
Thanh C. Tran
6c5fb579d4 Change to use batch size to store each batch location due iterator invalidation of deque container when push and pop 2017-07-19 18:39:00 +02:00
Thanh C. Tran
2338dd294d Merge branch 'master' into SMS_fixbug 
* master:
  New progressbar which is more smoth
  Added an address offset to the gem5 setup
  Read before write in miss scenarios for FR_FCFS_RP
  Changed FR_FCFS_RP to C++11 style
  Changed FR_FCFS_RP Scheduler
 2017-07-19 16:19:01 +02:00
Matthias Jung
3a1b3cf08a New progressbar which is more smoth 2017-07-19 13:01:05 +03:00
Matthias Jung
0cfe391113 Added an address offset to the gem5 setup 2017-07-19 12:07:26 +03:00
Matthias Jung
3c2efc285d Read before write in miss scenarios for FR_FCFS_RP 2017-07-19 11:53:27 +03:00
Matthias Jung
e3450687c8 Changed FR_FCFS_RP to C++11 style 2017-07-19 11:22:46 +03:00
Matthias Jung
7eebbf3bdf Merge branch 'master' of git.rhrk.uni-kl.de:EIT-Wehn/dram.vp.system 2017-07-19 10:37:46 +03:00
Matthias Jung
9985b9175e Changed FR_FCFS_RP Scheduler 
Added hazard detection and simplification of the code.
 2017-07-19 10:37:00 +03:00
Thanh C. Tran
7f9569f25d Optimize with passing const references 2017-07-16 04:19:51 +02:00
Éder F. Zulian
3a3d8162b2 Minor improvements after PR#169 2017-07-15 13:55:45 +02:00
fzeder
db7f4dbee0 Merge pull request #169 from trancong/master 
Update  to generate per-thread plots and per-thread metrics
 2017-07-15 13:09:49 +02:00
Thanh C. Tran
391bd79ac0 Enable per-thread metrics 2017-07-14 21:31:51 +02:00
Thanh C. Tran
024b288f3f Change script to automatically generate per-thread plots 2017-07-14 14:43:11 +02:00
Matthias Jung
e27b147634 Merge pull request #168 from trancong/master 
Few fixes for plotting script, TLM Recorder and Debugger
 2017-07-13 13:21:21 +02:00
Matthias Jung
ba3a1d704f Read Priorization for FR_FCFS 
I Added the feature that RD is always prioritized before WR for FR_FCFS.
Instead of searching the next row hit for a specific bank it searches
for the next row hit which is a read. If there is not read hit found it
searches for a write read. If no write read is found it takes the oldest
request. Even this could be further improved of course because RD/WR
switching is actually not a per bank problem its because of the shared
busses.
 2017-07-12 23:32:17 +02:00
Thanh C. Tran
665b38f5cf Fix system hang when plotting histogram 2017-07-12 15:55:52 +02:00
Thanh C. Tran
09993f793f Fix memory leak when destroy TlmRecoder object by calling sqlite3_finalize() 2017-07-12 15:52:24 +02:00
Thanh C. Tran
5bc71d04e7 Add missing step to write debug message into a text file 2017-07-12 15:50:13 +02:00
Matthias Jung
e65f3c3573 Added elastic trace example for the memory hog 2017-06-26 00:23:40 +02:00
Matthias Jung
f17fd94616 Merge branch 'master' of git.rhrk.uni-kl.de:EIT-Wehn/dram.vp.system 2017-06-25 18:10:05 +02:00
Matthias Jung
2239fefa61 Added some more gem5 related files 2017-06-25 18:08:25 +02:00
fzeder
85f36de55b Merge pull request #164 from jfeldman/master 
ECC Controller implementation with basic Hamming code
 2017-06-22 14:56:32 +02:00
fzeder
bd883f031c Merge branch 'master' into master 2017-06-22 13:32:19 +02:00
fzeder
53056bc2b4 Merge pull request #160 from trancong/Simple_SMS 
Simple SMS branch
 2017-06-22 13:20:52 +02:00
Thanh C. Tran
a5e62f75ab Revert back to use default simulation file 2017-06-22 12:37:46 +02:00
Thanh C. Tran
78a4637fdd Merge branch 'master' into Simple_SMS 
* master:
  Fix some segfaults.
 2017-06-22 12:31:16 +02:00
Éder F. Zulian
de7381ae49 Fix some segfaults. 
In the current implementation the object deletion order is important.

Messages regarding power and energy are printed inside the Dram destructor.
The controller object was destructed and then called by the Dram object.

The behavior varies with compiler (clang or gcc). It seems that clang deletes
objects later than gcc masking some bugs.
 2017-06-22 12:05:40 +02:00
Johannes Feldmann
928d13af2f Merge branch 'develop' 
# Conflicts:
#	DRAMSys/simulator/src/error/controllerECC.h
 2017-06-22 09:38:20 +02:00
Thanh C. Tran
64b105d5c7 Fix Disable Refresh Issue 2017-06-21 16:42:47 +02:00