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Fix Disable Refresh Issue

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This commit is contained in:
Thanh C. Tran
2017-06-21 16:42:47 +02:00
parent f09d47e143
commit 64b105d5c7
11 changed files with 65 additions and 0 deletions
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32
DRAMSys/simulator/src/controller/Controller.cpp
View File

@@ -300,6 +300,11 @@ void Controller::frontendPEQCallback(tlm_generic_payload &payload, const tlm_pha
scheduler->schedule(&payload);
scheduleNextFromScheduler(DramExtension::getExtension(payload).getBank());
}
else if (phase == PendingRequest)
{
// Schedule a pending request.
scheduleNextFromScheduler(DramExtension::getExtension(payload).getBank());
}
else if (phase == END_RESP)
{
if (backpressure != NULL)
@@ -365,6 +370,7 @@ void Controller::scheduleNextFromScheduler(Bank bank)
return;
}
bool rescheduled = true;
pair<Command, tlm::tlm_generic_payload*> nextRequest = scheduler->getNextRequest(bank);
if(nextRequest.second != NULL)
{
@@ -372,7 +378,17 @@ void Controller::scheduleNextFromScheduler(Bank bank)
controllerCore->scheduleRequest(nextRequest.first, *nextRequest.second);
printDebugMessage("\t-> Next payload was scheduled by core [" + commandToString(nextRequest.first) + "]");
}
else
{
gp* pendingRequest = scheduler->getPendingRequest(bank);
if (pendingRequest != NULL)
{
rescheduled = true;
frontendPEQ.notify(*(pendingRequest), PendingRequest, Configuration::getInstance().memSpec.clk);
}
}
queue<Bank> blocked;
while (!blockedRequests.empty()) {
bank = blockedRequests.front();
blockedRequests.pop();
@@ -383,7 +399,23 @@ void Controller::scheduleNextFromScheduler(Bank bank)
controllerCore->scheduleRequest(nextRequest.first, *nextRequest.second);
printDebugMessage("\t-> Next payload was scheduled by core [" + commandToString(nextRequest.first) + "] (unblocked)");
}
else
{
gp* pendingRequest = scheduler->getPendingRequest(bank);
if(pendingRequest != NULL)
{
//Pending request
if(!rescheduled)
{
rescheduled = true;
frontendPEQ.notify(*(pendingRequest), PendingRequest, Configuration::getInstance().memSpec.clk);
}
else
blocked.push(bank);
}
}
}
blockedRequests = blocked;
}
void Controller::sendToFrontend(tlm_generic_payload &payload, const tlm_phase &phase, const sc_time &delay)

2
DRAMSys/simulator/src/controller/Controller.h
View File

@@ -73,6 +73,8 @@
using namespace std;
using namespace tlm;
DECLARE_EXTENDED_PHASE(PendingRequest);
struct Controller: public sc_module, public IController
{
public:

5
DRAMSys/simulator/src/controller/scheduler/Fifo.cpp
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@@ -60,4 +60,9 @@ pair<Command, tlm::tlm_generic_payload*> Fifo::getNextRequest(Bank bank)
return pair<Command, tlm::tlm_generic_payload*>(Command::NOP, NULL);
}
gp* Fifo::getPendingRequest(Bank bank)
{
return NULL;
}

1
DRAMSys/simulator/src/controller/scheduler/Fifo.h
View File

@@ -52,6 +52,7 @@ public:
void schedule(gp* payload) override;
std::pair<Command, tlm::tlm_generic_payload*> getNextRequest(Bank bank) override;
virtual gp* getPendingRequest(Bank bank) override;
private:
std::map<Bank, std::deque<gp*>> buffer;

4
DRAMSys/simulator/src/controller/scheduler/FifoStrict.cpp
View File

@@ -128,3 +128,7 @@ std::pair<Command, tlm::tlm_generic_payload *> FifoStrict::getNextRequest(Bank b
return pair<Command, tlm::tlm_generic_payload*>(Command::NOP, NULL);
}
gp* FifoStrict::getPendingRequest(Bank bank)
{
return NULL;
}

1
DRAMSys/simulator/src/controller/scheduler/FifoStrict.h
View File

@@ -56,6 +56,7 @@ public:
void schedule(gp* payload) override;
std::pair<Command, tlm::tlm_generic_payload*> getNextRequest(Bank bank) override;
virtual gp* getPendingRequest(Bank bank) override;
private:
std::deque<std::pair<Bank, tlm::tlm_generic_payload *>> buffer;

5
DRAMSys/simulator/src/controller/scheduler/Fr_Fcfs.cpp
View File

@@ -121,3 +121,8 @@ deque<gp*>::iterator FR_FCFS::FindRowHit(Bank bank)
return queue.end();
}
gp* FR_FCFS::getPendingRequest(Bank bank)
{
return NULL;
}

1
DRAMSys/simulator/src/controller/scheduler/Fr_Fcfs.h
View File

@@ -53,6 +53,7 @@ public:
void schedule(gp* payload) override;
std::pair<Command, tlm::tlm_generic_payload*> getNextRequest(Bank bank) override;
virtual gp* getPendingRequest(Bank bank) override;
private:
std::map<Bank, std::deque<gp*>> buffer;

1
DRAMSys/simulator/src/controller/scheduler/IScheduler.h
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@@ -54,6 +54,7 @@ public:
virtual void schedule(gp* payload) = 0;
virtual std::pair<Command, gp*> getNextRequest(Bank bank) = 0;
virtual gp* getPendingRequest(Bank bank) = 0;
static std::string sendername;
protected:

12
DRAMSys/simulator/src/controller/scheduler/SMS.cpp
View File

@@ -343,3 +343,15 @@ void SMS::multiBatchFormation(sc_time memClk)
} while (formed);
}
}
gp* SMS::getPendingRequest(Bank bank)
{
for (auto& requestBuffer : requestBuffers) {
for (auto& request : requestBuffer.second) {
if (DramExtension::getBank(request) == bank) {
return request;
}
}
}
return NULL;
}

1
DRAMSys/simulator/src/controller/scheduler/SMS.h
View File

@@ -46,6 +46,7 @@ public:
virtual void schedule(gp *payload) override;
virtual std::pair<Command, gp*> getNextRequest(Bank bank) override;
virtual gp* getPendingRequest(Bank bank) override;
void batchScheduler();