Lukas Steiner
5b4ed9559d
Merge branch 'config_refactor' into 'develop'
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Configuration Refactoring
See merge request ems/astdm/modeling.dram/dram.sys.5!63
2024-02-23 14:29:06 +00:00
0ec6ea79ad
Migrate from clkMhz to tCK entry in memspecs
2024-02-23 12:04:22 +01:00
59cf73fe9c
Clean up public API (DRAMSys.h)
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Remove DRAMSysRecordable.h/cpp as the functionality has been incorporated into
DRAMSys.h/cpp. The databaseRecording config is now completely handled by
DRAMSys itself without needing the user of the library to instanciate DRAMSys
or DRAMSysRecordable depending on this config.
2024-02-23 11:54:51 +01:00
5391b4351d
Fix configuration tests
2024-02-23 11:54:51 +01:00
ed2a675145
Extract plausability check from AddressDecoder to separate function
2023-12-11 10:32:39 +01:00
Lukas Steiner
8224e97abe
Reformat all files.
2023-09-21 16:50:59 +02:00
a0f93a75e2
Merge develop
2023-08-21 10:01:08 +02:00
e3bd773cac
Implement isFullCycle, alignAtNext functions in utils and add tests
2023-08-15 10:58:10 +02:00
a9759f51fa
Enable warnings in dev preset and fix them
2023-06-09 11:29:15 +02:00
Lukas Steiner
20f6aae787
Replace tabs with whitespaces.
2023-05-25 16:09:55 +02:00
Lukas Steiner
b3955d6d02
Update TUK to RPTU.
2023-05-25 15:15:52 +02:00
69cd04c448
Namespace the complete DRAMSys library
2023-05-17 11:42:00 +02:00
aa07f071aa
Update AddressDecoderTest
2023-04-13 11:34:27 +02:00
a49afa40eb
Use key "addressmapping" instead of "CONGEN" in addressmapping configs
2023-04-13 11:21:36 +02:00
c8e509a120
Add EccModule to simulator
2023-04-13 11:21:36 +02:00
d27a29ca80
Refactor configuration library
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The configuration library has been refactored to make use of nlohmann
macros to reduce boilerplate code.
The nlohmann parser callback is used to decide whether to include
configuration json objects directly, or if they need to be loaded
from a sperate file.
2023-04-13 11:18:39 +02:00
c51e21ea69
Fix test_dramsys linker error
2023-03-22 12:57:25 +01:00
53d913c5f1
Make BlockingRead/WriteDelay configurable
2023-03-17 09:45:11 +01:00
ac9351c025
Implement b_transport and add tests for it
2023-03-06 14:10:56 +01:00
Thomas Psota
f434026ccd
Added extension mechanism and ported DDR5, LPDDR5, HBM3, TraceAnalyzer
2023-02-09 14:22:34 +01:00
Thomas Psota
b63c9beb50
Intensive refactor of DRAMSys project structure and CMakeFiles
2022-12-14 15:51:46 +01:00
