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modified rd/grouper

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This commit is contained in:
Robert Gernhardt
2014-08-06 10:02:56 +02:00
parent 0bba004266 15f07b0017
commit 767d03dfe9
12 changed files with 54 additions and 72 deletions
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1
dram/dramSys/dramSys.pro
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@@ -15,6 +15,7 @@ LIBS += -L../src/common/third_party/DRAMPower/src/ -ldrampower
INCLUDEPATH += /opt/systemc/include
INCLUDEPATH += /opt/boost/include
INCLUDEPATH += /opt/sqlite3/include
INCLUDEPATH += /opt/xerces-c-3.1.1/include
INCLUDEPATH += ../src/common/third_party/DRAMPower/src
INCLUDEPATH += ../src/common/third_party/DRAMPower/src/libdrampower

2
dram/resources/configs/memconfigs/fifo.xml
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@@ -1,6 +1,6 @@
<memspec>
<memconfig>
<parameter id="bankwiseLogic" type="bool" value="1" />
<parameter id="bankwiseLogic" type="bool" value="0" />
<parameter id="openPagePolicy" type="bool" value="1" />
<parameter id="adaptiveOpenPagePolicy" type="bool" value="0" />
<parameter id="refreshAwareScheduling" type="bool" value="0" />

2
dram/resources/simulations/sim-batch.xml
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@@ -10,7 +10,7 @@
<trace-setup id="media">
<device clkMhz="800">mediabench-epic_32.stl</device>
<device clkMhz="800">mediabench-epic_32.stl</device>
</trace-setup>
</trace-setups>

2
dram/src/controller/Controller.h
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@@ -116,7 +116,7 @@ template<unsigned int BUSWIDTH>
void Controller<BUSWIDTH>::buildScheduler()
{
string selectedScheduler = Configuration::getInstance().Scheduler;
//selectedScheduler == "ReadWriteGrouper";
selectedScheduler = "ReadWriteGrouper";
if (selectedScheduler == "FR_FCFS")
{

6
dram/src/controller/core/scheduling/checker/PrechargeAllChecker.cpp
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@@ -53,6 +53,12 @@ void PrechargeAllChecker::delayToSatisfyConstraints(ScheduledCommand& command) c
}
}
ScheduledCommand lastActivate = state.getLastCommand(Command::Activate, command.getBank());
if (lastActivate.isValidCommand())
{
command.delayToMeetConstraint(lastActivate.getStart(), config.Timings.tRAS);
}
state.bus.moveCommandToNextFreeSlot(command);
}

8
dram/src/controller/core/scheduling/checker/PrechargeChecker.cpp
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@@ -14,6 +14,7 @@ void PrechargeChecker::delayToSatisfyConstraints(ScheduledCommand& command) cons
{
sc_assert(command.getCommand() == Command::Precharge);
ScheduledCommand lastCommand = state.getLastScheduledCommand(command.getBank());
if (lastCommand.isValidCommand())
@@ -34,6 +35,13 @@ void PrechargeChecker::delayToSatisfyConstraints(ScheduledCommand& command) cons
reportFatal("Precharge Checker", "Precharge can not follow " + commandToString(lastCommand.getCommand()));
}
ScheduledCommand lastActivate = state.getLastCommand(Command::Activate, command.getBank());
if (lastActivate.isValidCommand())
{
command.delayToMeetConstraint(lastActivate.getStart(), config.Timings.tRAS);
}
state.bus.moveCommandToNextFreeSlot(command);
}

6
dram/src/controller/scheduler/Scheduler.cpp
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@@ -1,12 +1,16 @@
#include "Scheduler.h"
#include "../../common/DebugManager.h"
#include <iostream>
using namespace std;
using namespace scheduler;
std::string Scheduler::sendername = "scheduler";
void Scheduler::printDebugMessage(std::string message)
{
DebugManager::getInstance().printDebugMessage(Scheduler::sendername, message);
cout << "scheduler: " << message << std::endl;
//DebugManager::getInstance().printDebugMessage(Scheduler::sendername, message);
}

8
dram/src/controller/scheduler/readwritegrouper.cpp
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@@ -20,12 +20,13 @@ ReadWriteGrouper::~ReadWriteGrouper()
void ReadWriteGrouper::schedule(gp *payload)
{
tlm_command command = payload->get_command();
printDebugMessage("Scheduling new payload");
if(batches.size() > 2)
{
if(command == TLM_READ_COMMAND)
{
//printDebugMessage("Scheduling read");
if(schedulingReadCausesHazardWithQueuedWrite(payload))
{
printDebugMessage("Scheduling read causes hazard with queued write");
@@ -37,6 +38,7 @@ void ReadWriteGrouper::schedule(gp *payload)
}
else if(command == TLM_WRITE_COMMAND)
{
//printDebugMessage("Scheduling write");
getLatestWriteBatch().schedule(payload);
}
}
@@ -44,6 +46,8 @@ void ReadWriteGrouper::schedule(gp *payload)
{
if(command == TLM_READ_COMMAND)
{
//printDebugMessage("Scheduling read");
if(getLatestReadBatch().hasPayloads() && schedulingReadCausesHazardWithQueuedWrite(payload))
{
printDebugMessage("Scheduling read causes hazard with queued write");
@@ -52,6 +56,7 @@ void ReadWriteGrouper::schedule(gp *payload)
}
else if(!getLatestReadBatch().hasPayloads() && getLatestWriteBatch().hasPayloads())
{
printDebugMessage("Scheduling read, but there are writes to be processed first");
batches.erase(batches.begin());
batches.push_back(shared_ptr<FR_FCFS>(new FR_FCFS(controllerCore,true,false)));
batches.push_back(shared_ptr<FR_FCFS>(new FR_FCFS(controllerCore,true,false)));
@@ -61,6 +66,7 @@ void ReadWriteGrouper::schedule(gp *payload)
}
else if(command == TLM_WRITE_COMMAND)
{
//printDebugMessage("Scheduling write");
getLatestWriteBatch().schedule(payload);
}
}

70
dram/src/simulation/Dram.h
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@@ -30,7 +30,7 @@ using namespace core;
using namespace Data;
#define POWER
#define POWER //not better to define in simulation xml? also flag for storage simulation
#ifdef POWER
#define IFPOW(x) x
@@ -39,46 +39,6 @@ using namespace Data;
#endif
class column
{
private:
unsigned char * data;
unsigned int bytes;
public:
column()
{
bytes = 0;
data = NULL;
}
column(int bytes)
{
bytes = bytes;
data = new unsigned char[bytes];
}
~column()
{
//delete data;
}
void set(unsigned char * payloadDataPtr)
{
printf("Dest: %p Source: %p\n",data,payloadDataPtr);
cout << "mem" ;
memcpy(data, payloadDataPtr, bytes); // XXX hier knallts
cout << "copy" << endl;
}
void get(unsigned char * payloadDataPtr)
{
memcpy(payloadDataPtr, data, bytes);
}
};
template<unsigned int BUSWIDTH = 128, unsigned int WORDS = 4096, bool STORE = true, bool FIXED_BL = false,
unsigned int FIXED_BL_VALUE = 0>
struct Dram: sc_module
@@ -86,7 +46,7 @@ struct Dram: sc_module
tlm_utils::simple_target_socket<Dram, BUSWIDTH, tlm::tlm_base_protocol_types> tSocket;
IFPOW(libDRAMPower *DRAMPower);
map< unsigned long int, column * > memory;
map< unsigned long int, unsigned char[BUSWIDTH/2] > memory;
SC_CTOR(Dram) : tSocket("socket")
{
@@ -131,28 +91,24 @@ struct Dram: sc_module
else if (phase == BEGIN_WR)
{
IFPOW(DRAMPower->doCommand(MemCommand::WR, bank, cycle));
//save data:
memcpy(&memory[payload.get_address()], payload.get_data_ptr(), BUSWIDTH/8);
sendToController(payload, END_WR, delay + getExecutionTime(Command::Write, payload));
// Save:
column * c = new column(16);
c->set(payload.get_data_ptr()); // <-- hier drin knallts
memory[payload.get_address()] = c;
}
else if (phase == BEGIN_RD)
{
IFPOW(DRAMPower->doCommand(MemCommand::RD, bank, cycle));
sendToController(payload, END_RD, delay + getExecutionTime(Command::Read, payload));
// Load:
//if(memory.count(payload.get_address()) == 1)
//{
// column * c = memory[payload.get_address()];
// c->get(payload.get_data_ptr());
//}
//else
//{
// SC_REPORT_WARNING ("DRAM", "Reading from an empty memory location");
//}
// Load data:
if(memory.count(payload.get_address()) == 1)
{
memcpy(payload.get_data_ptr(), &memory[payload.get_address()], BUSWIDTH/8);
}
else
{
//SC_REPORT_WARNING ("DRAM", "Reading from an empty memory location.");
}
}
else if (phase == BEGIN_WRA)
{

2
dram/src/simulation/SimulationManager.cpp
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@@ -1,4 +1,4 @@
/*
/*
* SimulationManager.cpp
*
* Created on: Apr 12, 2014

18
dram/src/simulation/TracePlayer.h
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@@ -115,15 +115,15 @@ void TracePlayer<BUSWIDTH>::generateNextPayload()
payload->set_command(TLM_WRITE_COMMAND);
// Parse and set data
file >> data;
unsigned int counter = 0;
for(int i = 0; i < 16*2-2; i=i+2) // TODO column / burst breite
{
std::string byteString = "0x";
byteString.append(data.substr(i+2, 2));
//cout << byteString << " " << std::stoi(byteString.c_str(), 0, 16) << endl;
dataElement[counter++] = std::stoi(byteString.c_str(), 0, 16);
}
// file >> data;
// unsigned int counter = 0;
// for(int i = 0; i < 16*2-2; i=i+2) // TODO column / burst breite
// {
// std::string byteString = "0x";
// byteString.append(data.substr(i+2, 2));
// //cout << byteString << " " << std::stoi(byteString.c_str(), 0, 16) << endl;
// dataElement[counter++] = std::stoi(byteString.c_str(), 0, 16);
// }
}
else
{

1
dram/src/simulation/main.cpp
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@@ -32,6 +32,7 @@ int main(int argc, char **argv)
int sc_main(int argc, char **argv)
{
cout<<"hello"<<endl;
sc_set_time_resolution(1, SC_PS);
resources = pathOfFile(argv[0]) + string("/../resources/");