derek/gem5
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
c5e8e0e7c7028848c1317216693184f64db62b45
gem5/src/mem
History
Andreas Sandberg 5cd4248672 python: Replace dict.has_key with 'key in dict' 
Python 3 has removed dict.has_key in favour of 'key in dict'.

Change-Id: I9852a5f57d672bea815308eb647a0ce45624fad5
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15987
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2019-02-12 17:36:12 +00:00
..
cache
mem-cache: Irregular Stream Buffer Prefetcher
2019-02-12 14:06:19 +00:00
probes
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
protocol
mem-ruby: Fixing MESI Three Level
2019-02-12 05:51:07 +00:00
qos
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
ruby
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
slicc
python: Replace dict.has_key with 'key in dict'
2019-02-12 17:36:12 +00:00
abstract_mem.cc
mem: Compile tracePacket only when TRACING_ON is defined
2018-12-07 13:28:19 +00:00
abstract_mem.hh
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
AbstractMemory.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
addr_mapper.cc
mem: Make cache terminology easier to understand
2015-12-31 09:32:58 -05:00
addr_mapper.hh
…
AddrMapper.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
bridge.cc
mem: Rename Packet::checkFunctional to trySatisfyFunctional
2018-07-23 11:57:50 +00:00
bridge.hh
mem: Rename Packet::checkFunctional to trySatisfyFunctional
2018-07-23 11:57:50 +00:00
Bridge.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
coherent_xbar.cc
mem: Rename Packet::checkFunctional to trySatisfyFunctional
2018-07-23 11:57:50 +00:00
coherent_xbar.hh
mem: Co-ordination of CMOs in the xbar
2017-12-05 11:47:01 +00:00
comm_monitor.cc
mem: Add tryTiming suppport to CommMonitor
2019-01-22 09:16:50 +00:00
comm_monitor.hh
mem: Add tryTiming suppport to CommMonitor
2019-01-22 09:16:50 +00:00
CommMonitor.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
dram_ctrl.cc
mem: Determine if a packet queue forces ordering at construction
2019-01-17 11:09:41 +00:00
dram_ctrl.hh
mem: Make DRAMCtrl a QoS-aware Memory Controller
2018-09-07 13:16:20 +00:00
DRAMCtrl.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
drampower.cc
mem: Remove unused 'using namespace'
2018-04-06 08:38:06 +00:00
drampower.hh
mem: Fix search-replace issues in DRAMPower wrapper license
2015-11-25 13:52:56 -05:00
dramsim2_wrapper.cc
misc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-12-04 23:10:55 +00:00
dramsim2_wrapper.hh
…
dramsim2.cc
mem: Rename Packet::checkFunctional to trySatisfyFunctional
2018-07-23 11:57:50 +00:00
dramsim2.hh
mem: Replace EventWrapper use with EventFunctionWrapper
2017-06-20 18:03:21 +00:00
DRAMSim2.py
…
external_master.cc
sim,cpu,mem,arch: Introduced MasterInfo data structure
2018-04-27 16:00:28 +00:00
external_master.hh
mem: Standardize mem folder header guards
2018-02-06 10:26:27 +00:00
external_slave.cc
kvm, mem: Refactor some Event subclasses into lambdas
2017-07-12 20:07:05 +00:00
external_slave.hh
mem: Standardize mem folder header guards
2018-02-06 10:26:27 +00:00
ExternalMaster.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
ExternalSlave.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
fs_translating_port_proxy.cc
mem: Remove unused 'using namespace'
2018-04-06 08:38:06 +00:00
fs_translating_port_proxy.hh
mem: Refactor port proxies to support secure accesses
2018-02-19 14:24:46 +00:00
hmc_controller.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
hmc_controller.hh
mem: Standardize mem folder header guards
2018-02-06 10:26:27 +00:00
HMCController.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
mem_checker_monitor.cc
arch, base, cpu, gpu, mem: Replace assert(0 or false with panic.
2018-11-27 21:58:24 +00:00
mem_checker_monitor.hh
…
mem_checker.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
mem_checker.hh
misc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-12-04 23:10:55 +00:00
mem_delay.cc
mem: Rename Packet::checkFunctional to trySatisfyFunctional
2018-07-23 11:57:50 +00:00
mem_delay.hh
mem: Rename Packet::checkFunctional to trySatisfyFunctional
2018-07-23 11:57:50 +00:00
mem_master.hh
sim,cpu,mem,arch: Introduced MasterInfo data structure
2018-04-27 16:00:28 +00:00
mem_object.cc
…
mem_object.hh
…
MemChecker.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
MemDelay.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
MemObject.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
mport.cc
…
mport.hh
style: remove trailing whitespace
2016-02-06 17:21:18 -08:00
multi_level_page_table.hh
x86, mem: Rewrite the multilevel page table class.
2018-01-23 20:14:48 +00:00
noncoherent_xbar.cc
mem: Rename Packet::checkFunctional to trySatisfyFunctional
2018-07-23 11:57:50 +00:00
noncoherent_xbar.hh
sim: Decouple draining from the SimObject hierarchy
2015-07-07 09:51:05 +01:00
packet_access.hh
null: Stop specifying an endianness in isa_traits.hh.
2018-10-18 07:48:10 +00:00
packet_queue.cc
mem: Allow inserts in the begining of a packet queue
2019-01-17 11:09:41 +00:00
packet_queue.hh
mem: Determine if a packet queue forces ordering at construction
2019-01-17 11:09:41 +00:00
packet.cc
arch-arm: We add PRFM PST instruction for arm
2018-10-26 12:47:46 +00:00
packet.hh
arch-arm: We add PRFM PST instruction for arm
2018-10-26 12:47:46 +00:00
page_table.cc
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
page_table.hh
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
physical.cc
mem: Use address range to find the right physical address
2018-06-19 14:24:25 +00:00
physical.hh
mem: Use the caching in the AddrRangeMap class in PhysicalMemory
2018-06-19 14:24:25 +00:00
port_proxy.cc
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
port_proxy.hh
mem: Refactor port proxies to support secure accesses
2018-02-19 14:24:46 +00:00
port.cc
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
port.hh
mem: Add function to check if the slave can receive a timing req
2017-12-05 11:47:01 +00:00
qport.hh
mem: Determine if a packet queue forces ordering at construction
2019-01-17 11:09:41 +00:00
request.hh
arch-arm: We add PRFM PST instruction for arm
2018-10-26 12:47:46 +00:00
SConscript
mem: Add a QoS-aware Memory Controller type
2018-09-07 13:16:20 +00:00
se_translating_port_proxy.cc
mem: Refactor port proxies to support secure accesses
2018-02-19 14:24:46 +00:00
se_translating_port_proxy.hh
mem: Refactor port proxies to support secure accesses
2018-02-19 14:24:46 +00:00
serial_link.cc
mem: Rename Packet::checkFunctional to trySatisfyFunctional
2018-07-23 11:57:50 +00:00
serial_link.hh
mem: Rename Packet::checkFunctional to trySatisfyFunctional
2018-07-23 11:57:50 +00:00
SerialLink.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
simple_mem.cc
mem: Rename Packet::checkFunctional to trySatisfyFunctional
2018-07-23 11:57:50 +00:00
simple_mem.hh
mem: Standardize mem folder header guards
2018-02-06 10:26:27 +00:00
SimpleMemory.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
snoop_filter.cc
style: change C/C++ source permissions to noexec
2018-01-10 16:49:23 +00:00
snoop_filter.hh
style: change C/C++ source permissions to noexec
2018-01-10 16:49:23 +00:00
stack_dist_calc.cc
style: fix missing spaces in control statements
2016-02-06 17:21:19 -08:00
stack_dist_calc.hh
mem: Redesign the stack distance calculator as a probe
2015-08-04 10:29:13 +01:00
tport.cc
mem: Rename Packet::checkFunctional to trySatisfyFunctional
2018-07-23 11:57:50 +00:00
tport.hh
mem: Unify delayed packet deletion
2015-11-06 03:26:21 -05:00
xbar.cc
mem: Use address range to find the destination port in the xbar
2018-06-19 14:24:25 +00:00
xbar.hh
mem: Use address range to find the destination port in the xbar
2018-06-19 14:24:25 +00:00
XBar.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00