mem: Remove unused 'using namespace'

Removal of unused/barely used 'using namespace' from C++ files.

Change-Id: I66dc548c04506db2e41180b9ea7ab5abd7d5375a
Reviewed-on: https://gem5-review.googlesource.com/9601
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

src/mem/cache/mshr.cc

@@ -60,8 +60,6 @@
 #include "mem/cache/cache.hh"
 #include "sim/core.hh"
 
-using namespace std;
-
 MSHR::MSHR() : downstreamPending(false),
                pendingModified(false),
                postInvalidate(false), postDowngrade(false),
@@ -617,7 +615,7 @@ MSHR::print(std::ostream &os, int verbosity, const std::string &prefix) const
 std::string
 MSHR::print() const
 {
-    ostringstream str;
+    std::ostringstream str;
     print(str);
     return str.str();
 }

src/mem/cache/mshr_queue.cc

@@ -47,8 +47,6 @@
 
 #include "mem/cache/mshr_queue.hh"
 
-using namespace std;
-
 MSHRQueue::MSHRQueue(const std::string &_label,
                      int num_entries, int reserve, int demand_reserve)
     : Queue<MSHR>(_label, num_entries, reserve),

src/mem/cache/tags/base.cc

@@ -52,8 +52,6 @@
 #include "mem/cache/base.hh"
 #include "sim/sim_exit.hh"
 
-using namespace std;
-
 BaseTags::BaseTags(const Params *p)
     : ClockedObject(p), blkSize(p->block_size), blkMask(blkSize - 1),
       size(p->size),

src/mem/cache/tags/base_set_assoc.cc

@@ -52,8 +52,6 @@
 #include "base/intmath.hh"
 #include "sim/core.hh"
 
-using namespace std;
-
 BaseSetAssoc::BaseSetAssoc(const Params *p)
     :BaseTags(p), assoc(p->assoc), allocAssoc(p->assoc),
      blks(p->size / p->block_size),

src/mem/cache/tags/fa_lru.cc

@@ -53,8 +53,6 @@
 #include "base/intmath.hh"
 #include "base/logging.hh"
 
-using namespace std;
-
 FALRU::FALRU(const Params *p)
     : BaseTags(p), cacheBoundaries(nullptr)
 {
@@ -122,7 +120,6 @@ FALRU::~FALRU()
 void
 FALRU::regStats()
 {
-    using namespace Stats;
     BaseTags::regStats();
     hits
         .init(numCaches+1)
@@ -140,7 +137,7 @@ FALRU::regStats()
         ;
 
     for (unsigned i = 0; i <= numCaches; ++i) {
-        stringstream size_str;
+        std::stringstream size_str;
         if (i < 3){
             size_str << (1<<(i+7)) <<"K";
         } else {

src/mem/cache/write_queue.cc

@@ -48,8 +48,6 @@
 
 #include "mem/cache/write_queue.hh"
 
-using namespace std;
-
 WriteQueue::WriteQueue(const std::string &_label,
                        int num_entries, int reserve)
     : Queue<WriteQueueEntry>(_label, num_entries, reserve)

src/mem/cache/write_queue_entry.cc

@@ -61,8 +61,6 @@
 #include "mem/cache/cache.hh"
 #include "sim/core.hh"
 
-using namespace std;
-
 inline void
 WriteQueueEntry::TargetList::add(PacketPtr pkt, Tick readyTime,
                                  Counter order)
@@ -163,7 +161,7 @@ WriteQueueEntry::print(std::ostream &os, int verbosity,
 std::string
 WriteQueueEntry::print() const
 {
-    ostringstream str;
+    std::ostringstream str;
     print(str);
     return str.str();
 }

src/mem/dram_ctrl.cc

@@ -2302,8 +2302,6 @@ DRAMCtrl::Rank::resetStats() {
 void
 DRAMCtrl::Rank::regStats()
 {
-    using namespace Stats;
-
     pwrStateTime
         .init(6)
         .name(name() + ".memoryStateTime")
@@ -2367,8 +2365,8 @@ DRAMCtrl::Rank::regStats()
         .name(name() + ".totalIdleTime")
         .desc("Total Idle time Per DRAM Rank");
 
-    registerDumpCallback(new RankDumpCallback(this));
-    registerResetCallback(new RankResetCallback(this));
+    Stats::registerDumpCallback(new RankDumpCallback(this));
+    Stats::registerResetCallback(new RankResetCallback(this));
 }
 void
 DRAMCtrl::regStats()

src/mem/drampower.cc

@@ -42,8 +42,6 @@
 #include "base/intmath.hh"
 #include "sim/core.hh"
 
-using namespace Data;
-
 DRAMPower::DRAMPower(const DRAMCtrlParams* p, bool include_io) :
     powerlib(libDRAMPower(getMemSpec(p), include_io))
 {

src/mem/fs_translating_port_proxy.cc

@@ -54,8 +54,6 @@
 #include "cpu/thread_context.hh"
 #include "sim/system.hh"
 
-using namespace TheISA;
-
 FSTranslatingPortProxy::FSTranslatingPortProxy(ThreadContext *tc)
     : PortProxy(tc->getCpuPtr()->getDataPort(),
                 tc->getSystemPtr()->cacheLineSize()), _tc(tc)

src/mem/mem_checker_monitor.cc

@@ -47,8 +47,6 @@
 #include "base/trace.hh"
 #include "debug/MemCheckerMonitor.hh"
 
-using namespace std;
-
 MemCheckerMonitor::MemCheckerMonitor(Params* params)
     : MemObject(params),
       masterPort(name() + "-master", *this),

src/mem/packet_queue.cc

@@ -47,8 +47,6 @@
 #include "debug/Drain.hh"
 #include "debug/PacketQueue.hh"
 
-using namespace std;
-
 PacketQueue::PacketQueue(EventManager& _em, const std::string& _label,
                          const std::string& _sendEventName,
                          bool disable_sanity_check)

src/mem/page_table.cc

@@ -45,8 +45,6 @@
 #include "sim/faults.hh"
 #include "sim/serialize.hh"
 
-using namespace std;
-
 void
 EmulationPageTable::map(Addr vaddr, Addr paddr, int64_t size, uint64_t flags)
 {
@@ -100,7 +98,7 @@ void
 EmulationPageTable::getMappings(std::vector<std::pair<Addr, Addr>> *addr_maps)
 {
     for (auto &iter : pTable)
-        addr_maps->push_back(make_pair(iter.first, iter.second.paddr));
+        addr_maps->push_back(std::make_pair(iter.first, iter.second.paddr));
 }
 
 void

src/mem/simple_mem.cc

@@ -48,8 +48,6 @@
 #include "base/trace.hh"
 #include "debug/Drain.hh"
 
-using namespace std;
-
 SimpleMemory::SimpleMemory(const SimpleMemoryParams* p) :
     AbstractMemory(p),
     port(name() + ".port", *this), latency(p->latency),