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a3f85217abae1ab340eadc4881253230f99cb4f7
gem5/src/arch/generic
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Gabe Black a3f85217ab arch,cpu,mem,sim: Fold arch/locked_mem.hh into the BaseISA class. 
Turn the functions within it into virtual methods on the ISA classes.
Eliminate the implementation in MIPS, which was just copy pasted from
Alpha long ago. Fix some minor style issues in ARM. Remove templating.
Switch from using an "XC" type parameter to using the ThreadContext *
installed in all ISA classes.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1053

Change-Id: I19ee3a8fbe50a4d7907029c2dd2796d0e98e965f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48384
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-08-31 11:17:32 +00:00
..
freebsd
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
linux
misc: Stop using getVirtProxy.
2021-07-23 03:42:17 +00:00
BaseInterrupts.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
BaseISA.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
BaseMMU.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
BaseTLB.py
arch: Implement operator& for TypeTLB
2021-08-05 08:26:33 +00:00
debugfaults.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
decode_cache.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
decoder.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
decoder.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
htm.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
htm.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
interrupts.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
isa.hh
arch,cpu,mem,sim: Fold arch/locked_mem.hh into the BaseISA class.
2021-08-31 11:17:32 +00:00
ISACommon.py
arch: Delete authors lists from generic arch files.
2020-02-18 03:34:56 +00:00
memhelpers.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
mmu.cc
arch: Provide an alternative view of the TLBs in the BaseMMU
2021-07-28 08:13:09 +00:00
mmu.hh
arch: Provide an alternative view of the TLBs in the BaseMMU
2021-07-28 08:13:09 +00:00
pcstate.hh
arch: Promote the micropc to the base PCState class.
2021-08-04 04:38:59 +00:00
SConscript
arch-riscv, arch-x86: Define unique PageTableWalker flag
2021-04-30 09:28:00 +00:00
tlb.hh
arch: Implement operator& for TypeTLB
2021-08-05 08:26:33 +00:00
vec_pred_reg.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
vec_reg.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00