arch-riscv, arch-x86: Define unique PageTableWalker flag

Rather than defining multiple flags (one per ISA), we should define
a single PageTableWalker flag shared by all ISAs

Change-Id: Iad460bcd9a69d5c6f90443e43feec318429165aa
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44965
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/generic/SConscript

@@ -47,6 +47,8 @@ SimObject('BaseMMU.py')
 SimObject('BaseTLB.py')
 SimObject('ISACommon.py')
 
+DebugFlag('PageTableWalker',
+          "Page table walker state machine debugging")
 DebugFlag('TLB')
 
 if env['TARGET_ISA'] == 'null':

src/arch/riscv/SConscript

@@ -75,8 +75,6 @@ if env['TARGET_ISA'] == 'riscv':
     DebugFlag('RiscvMisc')
     DebugFlag('TLBVerbose')
     DebugFlag('PMP')
-    DebugFlag('PageTableWalker', \
-              "Page table walker state machine debugging")
 
     # Add in files generated by the ISA description.
     ISADesc('isa/main.isa')

src/arch/x86/SConscript

@@ -77,8 +77,6 @@ SimObject('X86TLB.py')
 
 DebugFlag('Faults', "Trace all faults/exceptions/traps")
 DebugFlag('LocalApic', "Local APIC debugging")
-DebugFlag('PageTableWalker', \
-          "Page table walker state machine debugging")
 DebugFlag('Decoder', "Decoder debug output")
 DebugFlag('X86', "Generic X86 ISA debugging")