Add support for 64-bit PMU counter registers (PMEVCNTR<n>_EL0), as specified in Armv8-A. The counter registers are 32-bit by default, but 64-bit counters can be chosen using the `ArmPMU.use64bitCounters` parameter. Change-Id: Idb838a7438c7711438a7e078278bed21710049af Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69683 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>