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5260c7efeff525b74f16258057abf83edb57c79e
gem5/src/arch/alpha
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Gabe Black 5260c7efef alpha: Convert htog and gtoh to htole and letoh. 
When within the Alpha arch, we know the guest endianness already.

Change-Id: Iee22a33451a06c6e6a5c7d1e8c71f0b00e98ae3f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22367
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
2019-10-31 01:28:59 +00:00
..
freebsd
cpu: Create a PCEventScope class to abstract the scope of PCEvents.
2019-10-25 22:42:31 +00:00
isa
arch: Make a base class for Interrupts.
2019-10-19 01:45:48 +00:00
linux
alpha: Convert htog and gtoh to htole and letoh.
2019-10-31 01:28:59 +00:00
AlphaInterrupts.py
arch: Make a base class for Interrupts.
2019-10-19 01:45:48 +00:00
AlphaISA.py
arch, cpu: Add support for flattening misc register indexes.
2014-01-24 15:29:30 -06:00
AlphaSystem.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
AlphaTLB.py
python: Don't assume SimObjects live in the global namespace
2019-02-12 09:43:00 +00:00
aout_machdep.h
…
decoder.cc
ISA,CPU: Generalize and split out the components of the decode cache.
2012-05-26 13:45:12 -07:00
decoder.hh
isa: Add parameter to pick different decoder inside ISA
2015-10-09 14:50:54 -05:00
ecoff_machdep.h
…
ev5.cc
cpu: alpha: Delete all occurrances of the simPalCheck function.
2019-04-30 07:37:51 +00:00
ev5.hh
Alpha: Pull the MiscRegFile fully into the ISA object.
2009-07-08 23:02:22 -07:00
faults.cc
tarch, mem: Abstract the data stored in the SE page tables.
2018-01-23 20:39:17 +00:00
faults.hh
arch: ISA parser additions of vector registers
2017-07-05 14:43:49 +00:00
idle_event.cc
arch: cpu: Track kernel stats using the base ISA agnostic type.
2019-04-30 03:49:40 +00:00
idle_event.hh
cpu: Create a PCEventScope class to abstract the scope of PCEvents.
2019-10-25 22:42:31 +00:00
interrupts.cc
Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.
2008-10-12 09:09:56 -07:00
interrupts.hh
arch: Make a base class for Interrupts.
2019-10-19 01:45:48 +00:00
ipr.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
ipr.hh
style: Make a style pass over the whole arch/alpha directory.
2008-09-27 21:03:48 -07:00
isa_traits.hh
alpha,arm,mips,power,riscv,sparc,x86,cpu: Get rid of ISA_HAS_DELAY_SLOT.
2018-01-10 12:19:54 +00:00
isa.cc
alpha: Stop using architecture specific register types.
2019-01-31 11:04:46 +00:00
isa.hh
alpha: Stop using architecture specific register types.
2019-01-31 11:04:46 +00:00
kernel_stats.cc
stats: Move the swpipl function into the Alpha kernel stats.
2017-09-11 04:59:01 +00:00
kernel_stats.hh
stats: Move the swpipl function into the Alpha kernel stats.
2017-09-11 04:59:01 +00:00
locked_mem.hh
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
microcode_rom.hh
CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
2008-10-12 15:59:21 -07:00
mmapped_ipr.hh
arch: Add support for m5ops using mmapped IPRs
2013-09-30 12:20:43 +02:00
osfpal.cc
arch, base, cpu, dev, mem, sim: Remove #if 0-ed out code.
2019-05-18 10:20:20 +00:00
osfpal.hh
style: Make a style pass over the whole arch/alpha directory.
2008-09-27 21:03:48 -07:00
pagetable.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
pagetable.hh
misc: Remove redundant compiler-specific defines
2015-10-12 04:07:59 -04:00
process.cc
alpha: Convert htog and gtoh to htole and letoh.
2019-10-31 01:28:59 +00:00
process.hh
alpha: Stop using architecture specific register types.
2019-01-31 11:04:46 +00:00
pseudo_inst.hh
misc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-12-04 23:10:55 +00:00
registers.hh
cpu, arch: Replace the CCReg type with RegVal.
2019-02-01 01:22:19 +00:00
regredir.cc
SE/FS: Get rid of uses of FULL_SYSTEM in Alpha.
2011-11-01 04:01:14 -07:00
regredir.hh
Registers: Add a registers.hh file as an ISA switched header.
2009-07-08 23:02:21 -07:00
remote_gdb.cc
arch: cpu: Rename *FloatRegBits* to *FloatReg*.
2019-01-31 11:02:05 +00:00
remote_gdb.hh
sim, arch, base: Refactor the base remote GDB class.
2018-01-20 07:28:42 +00:00
SConscript
scons: Stop generating inc.d in the isa parser.
2017-10-17 18:57:50 +00:00
SConsopts
alpha: get rid of all turbolaser remnants
2009-04-08 22:22:49 -07:00
stacktrace.cc
arch, base, sim: Demote (SE|FS)TranslatingPortProxy &s to PortProxy &s.
2019-05-30 14:20:03 +00:00
stacktrace.hh
arch: Use const StaticInstPtr references where possible
2014-09-27 09:08:36 -04:00
system.cc
alpha: Convert htog and gtoh to htole and letoh.
2019-10-31 01:28:59 +00:00
system.hh
misc: Add explicit overrides and fix other clang >= 3.5 issues
2015-10-12 04:08:01 -04:00
tlb.cc
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
tlb.hh
misc: Using smart pointers for memory Requests
2018-06-11 16:55:30 +00:00
types.hh
arch: get rid of unused LargestRead typedef
2016-01-17 18:27:46 -08:00
utility.cc
arch, base, sim: Demote (SE|FS)TranslatingPortProxy &s to PortProxy &s.
2019-05-30 14:20:03 +00:00
utility.hh
misc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-12-04 23:10:55 +00:00
vtophys.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
vtophys.hh
MEM: Make port proxies use references rather than pointers
2012-02-24 11:45:30 -05:00