cpu: alpha: Delete all occurrances of the simPalCheck function.

This is now handled within the ISA description.

Change-Id: Ie409bb46d102e59d4eb41408d9196fe235626d32
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18434
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/alpha/ev5.cc

@@ -482,35 +482,3 @@ copyIprs(ThreadContext *src, ThreadContext *dest)
 }
 
 } // namespace AlphaISA
-
-using namespace AlphaISA;
-
-/**
- * Check for special simulator handling of specific PAL calls.
- * If return value is false, actual PAL call will be suppressed.
- */
-bool
-SimpleThread::simPalCheck(int palFunc)
-{
-    auto *stats = dynamic_cast<AlphaISA::Kernel::Statistics *>(kernelStats);
-    assert(stats || !kernelStats);
-
-    if (stats)
-        stats->callpal(palFunc, this);
-
-    switch (palFunc) {
-      case PAL::halt:
-        halt();
-        if (--System::numSystemsRunning == 0)
-            exitSimLoop("all cpus halted");
-        break;
-
-      case PAL::bpt:
-      case PAL::bugchk:
-        if (system->breakpoint())
-            return false;
-        break;
-    }
-
-    return true;
-}

src/cpu/checker/cpu.hh

@@ -539,8 +539,6 @@ class CheckerCPU : public BaseCPU, public ExecContext
     void setStCondFailures(unsigned int sc_failures) override {}
     /////////////////////////////////////////////////////
 
-    bool simPalCheck(int palFunc) override
-    { return thread->simPalCheck(palFunc); }
     void wakeup(ThreadID tid) override { }
     // Assume that the normal CPU's call to syscall was successful.
     // The checker's state would have already been updated by the syscall.

src/cpu/exec_context.hh

@@ -309,19 +309,6 @@ class ExecContext {
     /** Returns a pointer to the ThreadContext. */
     virtual ThreadContext *tcBase() = 0;
 
-    /**
-     * @{
-     * @name Alpha-Specific Interfaces
-     */
-
-    /**
-     * Check for special simulator handling of specific PAL calls.  If
-     * return value is false, actual PAL call will be suppressed.
-     */
-    virtual bool simPalCheck(int palFunc) = 0;
-
-    /** @} */
-
     /**
      * @{
      * @name ARM-Specific Interfaces

src/cpu/minor/exec_context.hh

@@ -365,16 +365,6 @@ class ExecContext : public ::ExecContext
         return thread.setMiscReg(reg.index(), val);
     }
 
-    bool
-    simPalCheck(int palFunc) override
-    {
-#if THE_ISA == ALPHA_ISA
-        return thread.simPalCheck(palFunc);
-#else
-        return false;
-#endif
-    }
-
     void
     syscall(int64_t callnum, Fault *fault) override
     {

src/cpu/o3/cpu.cc

@@ -917,33 +917,6 @@ FullO3CPU<Impl>::removeThread(ThreadID tid)
 */
 }
 
-template <class Impl>
-bool
-FullO3CPU<Impl>::simPalCheck(int palFunc, ThreadID tid)
-{
-#if THE_ISA == ALPHA_ISA
-    auto *stats = dynamic_cast<AlphaISA::Kernel::Statistics *>(
-            this->thread[tid]->kernelStats);
-    if (stats)
-        stats->callpal(palFunc, this->threadContexts[tid]);
-
-    switch (palFunc) {
-      case PAL::halt:
-        halt();
-        if (--System::numSystemsRunning == 0)
-            exitSimLoop("all cpus halted");
-        break;
-
-      case PAL::bpt:
-      case PAL::bugchk:
-        if (this->system->breakpoint())
-            return false;
-        break;
-    }
-#endif
-    return true;
-}
-
 template <class Impl>
 void
 FullO3CPU<Impl>::switchRenameMode(ThreadID tid, UnifiedFreeList* freelist)

src/cpu/o3/cpu.hh

@@ -385,8 +385,6 @@ class FullO3CPU : public BaseO3CPU
     /** Traps to handle given fault. */
     void trap(const Fault &fault, ThreadID tid, const StaticInstPtr &inst);
 
-    bool simPalCheck(int palFunc, ThreadID tid);
-
     /** Check if a change in renaming is needed for vector registers.
      * The vecMode variable is updated and propagated to rename maps.
      *

src/cpu/o3/dyn_inst.hh

@@ -250,7 +250,6 @@ class BaseO3DynInst : public BaseDynInst<Impl>
     }
     /** Traps to handle specified fault. */
     void trap(const Fault &fault);
-    bool simPalCheck(int palFunc) override;
 
     /** Emulates a syscall. */
     void syscall(int64_t callnum, Fault *fault) override;

src/cpu/o3/dyn_inst_impl.hh

@@ -191,16 +191,6 @@ BaseO3DynInst<Impl>::trap(const Fault &fault)
     this->cpu->trap(fault, this->threadNumber, this->staticInst);
 }
 
-template <class Impl>
-bool
-BaseO3DynInst<Impl>::simPalCheck(int palFunc)
-{
-#if THE_ISA != ALPHA_ISA
-    panic("simPalCheck called, but PAL only exists in Alpha!\n");
-#endif
-    return this->cpu->simPalCheck(palFunc, this->threadNumber);
-}
-
 template <class Impl>
 void
 BaseO3DynInst<Impl>::syscall(int64_t callnum, Fault *fault)

src/cpu/simple/exec_context.hh

@@ -502,16 +502,6 @@ class SimpleExecContext : public ExecContext {
     /** Returns a pointer to the ThreadContext. */
     ThreadContext *tcBase() override { return thread->getTC(); }
 
-    /**
-     * Check for special simulator handling of specific PAL calls.  If
-     * return value is false, actual PAL call will be suppressed.
-     */
-    bool
-    simPalCheck(int palFunc) override
-    {
-        return thread->simPalCheck(palFunc);
-    }
-
     bool
     readPredicate() const override
     {

src/cpu/simple_thread.cc

@@ -212,14 +212,3 @@ SimpleThread::copyArchRegs(ThreadContext *src_tc)
 {
     TheISA::copyRegs(src_tc, this);
 }
-
-// The following methods are defined in src/arch/alpha/ev5.cc for
-// Alpha.
-#if THE_ISA != ALPHA_ISA
-
-bool
-SimpleThread::simPalCheck(int palFunc)
-{
-    return true;
-}
-#endif

src/cpu/simple_thread.hh

@@ -181,8 +181,6 @@ class SimpleThread : public ThreadState, public ThreadContext
 
     void dumpFuncProfile() override;
 
-    bool simPalCheck(int palFunc);
-
     /*******************************************
      * ThreadContext interface functions.
      ******************************************/