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gem5/src/arch/riscv
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Gabe Black 25138cbb7a arch: Simplify and tidy up PCState classes. 
Change-Id: Ife5412fdd8cc8093371365b8dd4705f77b952191
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52034
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-10-28 05:50:26 +00:00
..
bare_metal
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
gdb-xml
scons: Use tags to gate ISA files and not env['TARGET_ISA'].
2021-10-19 20:41:03 +00:00
insts
scons: Use tags to gate ISA files and not env['TARGET_ISA'].
2021-10-19 20:41:03 +00:00
isa
arch-riscv: Use std::abs in riscv to avoid a warning.
2021-10-26 19:15:48 +00:00
linux
misc: Using OS::off_t in syscall signature
2021-10-13 07:44:00 +00:00
regs
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
decoder.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
decoder.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
faults.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
faults.hh
arch-riscv: Fix illegal instruction error message
2021-08-02 22:09:09 +00:00
fp_inst.hh
arch-riscv: When an inst generates a fault, return it immediately.
2021-05-20 23:42:13 +00:00
idle_event.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
idle_event.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
interrupts.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
isa.cc
arch,cpu,mem,sim: Fold arch/locked_mem.hh into the BaseISA class.
2021-09-28 19:56:01 +00:00
isa.hh
arch,cpu,mem,sim: Fold arch/locked_mem.hh into the BaseISA class.
2021-09-28 19:56:01 +00:00
mmu.hh
arch: Make the MMU ranged translateFunction pure virtual.
2021-10-22 21:43:02 +00:00
page_size.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pagetable_walker.cc
misc: Remove include of arch/page_size.hh, and fix up includes.
2021-10-22 21:43:02 +00:00
pagetable_walker.hh
misc: Move Mode and Translation from BaseTLB to BaseMMU
2021-07-07 08:44:13 +00:00
pagetable.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pagetable.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pcstate.hh
arch: Simplify and tidy up PCState classes.
2021-10-28 05:50:26 +00:00
pma_checker.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pma_checker.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
PMAChecker.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pmp.cc
arch-riscv: Fixed a bug in pmp.cc
2021-09-03 16:54:56 +00:00
pmp.hh
misc: Move Mode and Translation from BaseTLB to BaseMMU
2021-07-07 08:44:13 +00:00
PMP.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pra_constants.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
process.cc
misc: Rename Debug namespace as debug
2021-07-07 23:18:59 +00:00
process.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
reg_abi.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
reg_abi.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
remote_gdb.cc
scons: Turn the Blob method into a builder.
2021-08-28 04:19:40 +00:00
remote_gdb.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
RiscvFsWorkload.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
RiscvInterrupts.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
RiscvISA.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
RiscvMMU.py
arch: Add TypeTLB Param in BaseTLB
2021-07-28 08:13:09 +00:00
RiscvSeWorkload.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
RiscvTLB.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
SConscript
scons: Use tags to gate ISA files and not env['TARGET_ISA'].
2021-10-19 20:41:03 +00:00
SConsopts
scons: Turn the ISA and GPU ISA lists into construction variables.
2021-08-07 03:12:56 +00:00
se_workload.hh
sim: Move the MemPools object out of System and into SEWorkload.
2021-09-30 00:30:49 +00:00
stacktrace.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
tlb.cc
misc: Move Mode and Translation from BaseTLB to BaseMMU
2021-07-07 08:44:13 +00:00
tlb.hh
arch-riscv: Remove unused stats
2021-09-09 15:01:38 +00:00
types.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
utility.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
vecregs.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00