arch: Simplify and tidy up PCState classes.

Change-Id: Ife5412fdd8cc8093371365b8dd4705f77b952191
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52034
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>

src/arch/arm/pcstate.hh

@@ -79,22 +79,19 @@ class PCState : public GenericISA::UPCState<4>
         AArch64Bit = (1 << 2)
     };
 
-    uint8_t flags;
-    uint8_t nextFlags;
-    uint8_t _itstate;
-    uint8_t _nextItstate;
-    uint8_t _size;
-    bool _illegalExec;
+    uint8_t flags = 0;
+    uint8_t nextFlags = 0;
+    uint8_t _itstate = 0;
+    uint8_t _nextItstate = 0;
+    uint8_t _size = 0;
+    bool _illegalExec = false;
 
     // Software Step flags
-    bool _debugStep;
-    bool _stepped;
+    bool _debugStep = false;
+    bool _stepped = false;
 
   public:
-    PCState() : flags(0), nextFlags(0), _itstate(0), _nextItstate(0),
-                _size(0), _illegalExec(false), _debugStep(false),
-                _stepped(false)
-    {}
+    PCState() {}
 
     void
     set(Addr val)
@@ -103,10 +100,7 @@ class PCState : public GenericISA::UPCState<4>
         npc(val + (thumb() ? 2 : 4));
     }
 
-    PCState(Addr val) : flags(0), nextFlags(0), _itstate(0),
-                        _nextItstate(0), _size(0), _illegalExec(false),
-                        _debugStep(false), _stepped(false)
-    { set(val); }
+    PCState(Addr val) { set(val); }
 
     bool
     illegalExec() const

src/arch/power/pcstate.hh

@@ -42,24 +42,10 @@ namespace PowerISA
 class PCState : public GenericISA::SimplePCState<4>
 {
   private:
-    typedef GenericISA::SimplePCState<4> Base;
     ByteOrder guestByteOrder = ByteOrder::big;
 
   public:
-    PCState()
-    {}
-
-    void
-    set(Addr val)
-    {
-        Base::set(val);
-        npc(val + 4);
-    }
-
-    PCState(Addr val)
-    {
-        set(val);
-    }
+    using GenericISA::SimplePCState<4>::SimplePCState;
 
     ByteOrder
     byteOrder() const

src/arch/riscv/pcstate.hh

@@ -53,15 +53,14 @@ namespace RiscvISA
 class PCState : public GenericISA::UPCState<4>
 {
   private:
-    bool _compressed;
-    bool _rv32;
+    bool _compressed = false;
+    bool _rv32 = false;
 
   public:
-    PCState() : UPCState() { _compressed = false; _rv32 = false; }
-    PCState(Addr val) : UPCState(val) { _compressed = false; _rv32 = false; }
+    using GenericISA::UPCState<4>::UPCState;
 
     void compressed(bool c) { _compressed = c; }
-    bool compressed() { return _compressed; }
+    bool compressed() const { return _compressed; }
 
     void rv32(bool val) { _rv32 = val; }
     bool rv32() const { return _rv32; }

src/arch/x86/pcstate.hh

@@ -97,14 +97,14 @@ class PCState : public GenericISA::UPCState<8>
     }
 
     void
-    serialize(CheckpointOut &cp) const
+    serialize(CheckpointOut &cp) const override
     {
         Base::serialize(cp);
         SERIALIZE_SCALAR(_size);
     }
 
     void
-    unserialize(CheckpointIn &cp)
+    unserialize(CheckpointIn &cp) override
     {
         Base::unserialize(cp);
         UNSERIALIZE_SCALAR(_size);