This commit fixes two RISC-V instruction types (VectorXXX) that
were used in ARM SVE to the proper SimdXXX ones.
Change-Id: Id632926a89ae2395234f3cf34adeab63844bdd57
This commit fixes two RISC-V instruction types (VectorXXX) that
were used in ARM SVE to the proper SimdXXX ones.
Change-Id: Id632926a89ae2395234f3cf34adeab63844bdd57