Matthew Poremba 2aa95ccc7d arch-x86: Fix CPUID function 0 ...

This should return the number of standard features, not the number of
extended features.

Change-Id: Ieb3a36d832cee603f1efd39b4f430b5ac0478561
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70778
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>

2023-05-25 14:38:09 +00:00

..

amdgpu

arch-gcn3,arch-vega: Fix ds_read2st64_b32

2023-05-13 20:09:37 +00:00

arm

arch-arm: Add an ArmAllRelease containing every defined extension

2023-05-25 07:30:48 +00:00

generic

arch: Add a virtual method to the BaseISA to reset its ThreadContext.

2023-02-03 06:17:11 +00:00

isa_parser

misc: Use python f-strings for string formatting

2023-03-16 09:05:29 +00:00

mips

arch,base,dev,sim: Convert objects to use the HostSocket param type.

2023-04-12 02:18:22 +00:00

null

misc: Replace TARGET_ISA with USE_${ISA} variables.

2022-09-02 10:20:51 +00:00

power

arch,base,dev,sim: Convert objects to use the HostSocket param type.

2023-04-12 02:18:22 +00:00

riscv

arch-riscv: Merge rv32 and rv64 version of xperm4 and xperm8

2023-05-23 23:58:16 +00:00

sparc

misc: Fix 'unused variable' clang errors with gem5.fast

2023-05-08 22:54:06 +00:00

x86

arch-x86: Fix CPUID function 0

2023-05-25 14:38:09 +00:00

micro_asm_test.py

misc: Use python f-strings for string formatting

2023-03-16 09:05:29 +00:00

micro_asm.py

misc: Use python f-strings for string formatting

2023-03-16 09:05:29 +00:00

SConscript

arch,cpu: Add boilerplate support for matrix registers

2023-01-17 10:09:56 +00:00

SConsopts

misc: Replace TARGET_ISA with USE_${ISA} variables.

2022-09-02 10:20:51 +00:00