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16253e494e9275fb62d900d0f5f7bc7216fd8b3a
gem5/src/arch/generic
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Giacomo Travaglini 16253e494e arch: Fixed Packed register view for VecPredReg 
A bug in the VecPredRegContainer::as method was introduced by
a past commit [1]. The commit was not properly handling the case of
a Packed representation

If Packed == true -> NumElement = NumBits instead of
NumElements = NumBits / sizeof(VecElem)

This patch is fixing it

[1]: https://gem5-review.googlesource.com/c/public/gem5/+/42000

Change-Id: I308769c3938d0fac84316936f732a6c383146484
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51867
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-10-22 11:50:29 +00:00
..
freebsd
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
linux
misc: Stop using getVirtProxy.
2021-07-23 03:42:17 +00:00
BaseInterrupts.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
BaseISA.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
BaseMMU.py
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
BaseTLB.py
arch: Implement operator& for TypeTLB
2021-08-05 08:26:33 +00:00
debugfaults.hh
misc: Include static_inst_fwd.hh in sim/faults.hh.
2021-10-01 04:57:56 +00:00
decode_cache.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
decoder.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
decoder.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
htm.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
htm.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
interrupts.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
isa.hh
arch,cpu,mem,sim: Fold arch/locked_mem.hh into the BaseISA class.
2021-09-28 19:56:01 +00:00
ISACommon.py
arch: Delete authors lists from generic arch files.
2020-02-18 03:34:56 +00:00
memhelpers.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
mmu.cc
arch: Provide an alternative view of the TLBs in the BaseMMU
2021-07-28 08:13:09 +00:00
mmu.hh
arch: Provide an alternative view of the TLBs in the BaseMMU
2021-07-28 08:13:09 +00:00
pcstate.hh
arch: Promote the micropc to the base PCState class.
2021-08-04 04:38:59 +00:00
SConscript
arch-riscv, arch-x86: Define unique PageTableWalker flag
2021-04-30 09:28:00 +00:00
tlb.hh
arch: Implement operator& for TypeTLB
2021-08-05 08:26:33 +00:00
vec_pred_reg.hh
arch: Fixed Packed register view for VecPredReg
2021-10-22 11:50:29 +00:00
vec_reg.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00