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  • d6c0657116 Used the Fault constructor to create Interrupt faults. Using the pointer directly prevents reference counting from working correctly. Gabe Black 2006-03-01 00:14:09 -05:00
  • 69e91d7617 moved ev5_trap fully into the fault class. Gabe Black 2006-03-01 00:09:08 -05:00
  • 26d7b5a4d1 Add quiesceNs, quiesceTime, quiesceCycles, and m5panic pseudo ops. Ali Saidi 2006-02-28 18:41:04 -05:00
  • 34da58a698 Merge ktlim@zizzer:/bk/m5 into zamp.eecs.umich.edu:/z/ktlim2/clean/m5-clean Kevin Lim 2006-02-28 15:16:24 -05:00
  • 3a362d04b7 Corrected some mistakes in the hand merge Gabe Black 2006-02-28 06:28:09 -05:00
  • 8e6b8cb212 Hand merged Gabe Black 2006-02-28 06:17:57 -05:00
  • f7360d5bca Merge gblack@m5.eecs.umich.edu:/bk/multiarch into ewok.(none):/home/gblack/m5/multiarch Gabe Black 2006-02-28 06:13:35 -05:00
  • d207168eda Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5 into zizzer.eecs.umich.edu:/z/m5/Bitkeeper/multiarch Gabe Black 2006-02-28 06:03:57 -05:00
  • 299efffaf5 Cleaned up and slightly reorganized the Fault class heirarchy. Gabe Black 2006-02-28 06:02:18 -05:00
  • 6165419d35 Changed ev5_trap from a function of the execution context to a function of the fault. The actual function still resides in the execution context. Gabe Black 2006-02-27 23:26:13 -05:00
  • 36b2d9815e Moved the _stat for MachineCheckFault and AlignmentFault into the isa specific classes to prevent instantiation of the generic classes. Gabe Black 2006-02-27 16:46:00 -05:00
  • 31fc398f06 Fixes so that it compiles properly. Still working on .py file issues. Ron Dreslinski 2006-02-27 16:33:11 -05:00
  • 2f7b8ab1ec Got rid of the fault_addr function. Gabe Black 2006-02-27 16:27:01 -05:00
  • 96fd6b5c40 Merge ktlim@zizzer:/bk/m5 into zamp.eecs.umich.edu:/z/ktlim2/clean/m5-clean Kevin Lim 2006-02-27 12:09:08 -05:00
  • 70b35bab57 Changes to put all the misc regs within the misc reg file. This includes the FPCR, Uniq, lock flag, lock addr, and IPRs. Kevin Lim 2006-02-27 11:44:35 -05:00
  • f1ef4a8f06 Renamed arch files to remove alpha prefix, and changed alpha_memory.hh and cc to a more accurate tlb.hh and cc Gabe Black 2006-02-27 06:05:10 -05:00
  • c5dcd152f2 Changed targetarch to just arch. Gabe Black 2006-02-27 05:35:43 -05:00
  • f56d42c53d Fixed up some include paths. Gabe Black 2006-02-27 04:05:02 -05:00
  • 07cd7e966e Added isMachineCheckFault and isAlignmentFault virtual functions to the fault base class, and replaced the isA templated function with them where appropriate. Gabe Black 2006-02-27 04:02:45 -05:00
  • f9c2b9e74f Put the Alpha faults into the AlphaISA namespace Gabe Black 2006-02-27 04:00:24 -05:00
  • 444f520f7e MachineCheckFaults and AlignmentFaults are now generated by the ISA, rather than being created directly. Gabe Black 2006-02-27 03:57:15 -05:00
  • 1a0b326f5d Changed targetarch to arch for isa_traits.hh include Gabe Black 2006-02-27 01:38:47 -05:00
  • 4b256577e0 Where architecture independent sources included arch/alpha/xxx.hh, they were changed to include targetarch/xxx.hh Gabe Black 2006-02-27 01:32:49 -05:00
  • 29f50d9345 fix some minor stats stuff Nathan Binkert 2006-02-26 23:06:21 -05:00
  • 9b18c0e872 add some support for random access of data in packet fifos Nathan Binkert 2006-02-26 20:31:08 -05:00
  • 10fcad4ce0 Allow graph_group to not be selected so we can have a normal ungrouped barchart Nathan Binkert 2006-02-26 10:44:01 -05:00
  • 57092567ba better function categorization Nathan Binkert 2006-02-26 01:00:15 -05:00
  • 2c3e8d148c fix small python bug in database processing code Nathan Binkert 2006-02-26 00:57:37 -05:00
  • b7e4d16ea9 code cleanup Nathan Binkert 2006-02-26 00:35:10 -05:00
  • 0d71a17ed8 forgot to add a chart option Nathan Binkert 2006-02-26 00:19:02 -05:00
  • cf3667a0e4 add error bars and more options for legend placement Nathan Binkert 2006-02-26 00:11:54 -05:00
  • 46189e9e2b better colors for barcharts Nathan Binkert 2006-02-25 23:48:13 -05:00
  • 63db9860cf Make sure cpu/static_inst_exec_sigs.hh get rebuilt when CPU_MODELS parameter changes. Steve Reinhardt 2006-02-25 22:57:46 -05:00
  • 10bfe954af only build libelf.a, forget about the other libelf junk. Nathan Binkert 2006-02-25 22:03:47 -05:00
  • 25b39da69d Since the delayed write stuff is gone, get rid of regWrite and merge it with writeBar0 Nathan Binkert 2006-02-25 22:01:05 -05:00
  • 5705354616 Merge gblack@m5.eecs.umich.edu:/bk/multiarch into ewok.(none):/home/gblack/m5/multiarch Gabe Black 2006-02-24 18:45:46 -05:00
  • e66f521d5b Merge gblack@m5.eecs.umich.edu:/bk/multiarch into ewok.(none):/home/gblack/m5/multiarch Gabe Black 2006-02-24 18:45:28 -05:00
  • e5f75c2549 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5 into zizzer.eecs.umich.edu:/z/m5/Bitkeeper/multiarch Gabe Black 2006-02-24 18:33:57 -05:00
  • 4d01be373e Merge zizzer:/bk/m5 into zed.eecs.umich.edu:/z/hsul/work/m5/clean Lisa Hsu 2006-02-24 18:08:55 -05:00
  • fcb9718dcd 1) make it pretty for large clusters 2) make subticks vertical so they can be longer 3) make inner and outer axes farther apart to make room for subtick's vertical labels Lisa Hsu 2006-02-24 18:08:14 -05:00
  • 7a37037358 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5 into zizzer.eecs.umich.edu:/z/stever/bk/multiarch Steve Reinhardt 2006-02-24 08:52:38 -05:00
  • 802fd04f64 Removed a stray ::. Gabe Black 2006-02-24 03:51:21 -05:00
  • 08637efadc Changed Fault from a FaultBase * to a RefCountingPtr, added "new"s where appropriate, and took away the constant examples of each fault which where for comparing to a fault to determine its type. Gabe Black 2006-02-24 01:51:45 -05:00
  • a5f8392d34 Merge gblack@m5.eecs.umich.edu:/bk/multiarch into ewok.(none):/home/gblack/m5/multiarch Gabe Black 2006-02-23 19:32:38 -05:00
  • f6cac25dcf name changes ... Korey Sewell 2006-02-23 18:46:12 -05:00
  • b6247c9ea7 Add support for multiple ports on the memory. Hook up simple cpu to memory. Ron Dreslinski 2006-02-23 17:02:34 -05:00
  • 51647e7bec Enable building only selected CPU models via new scons CPU_MODELS parameter. For example: scons CPU_MODELS="SimpleCPU,FullCPU" ALPHA_SE/m5.debug Unfortunately the option is not sticky due to a scons bug with saving & restoring ListOption parameters. Steve Reinhardt 2006-02-23 17:00:29 -05:00
  • 4f831bc561 ev5.cc: SCCS merged Ali Saidi 2006-02-23 15:08:08 -05:00
  • e1c3acd91c Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5.head Ali Saidi 2006-02-23 15:06:06 -05:00
  • 1166d4f0bf Get rid of the xc from the alphaAccess/alphaConsole backdoor device. Now allocate an array of stacks indexed by cpu number which specify cpu stacks and are initialized by cpu 0. Othe cpus spin waiting for their stacks before continuing. This change *REQUIRES* a the new console code to operate correctly. Ali Saidi 2006-02-23 14:50:16 -05:00
  • 99484cfae8 Create a Builder object for .isa files in arch/SConscript. Start using SCons File objects to avoid fixed paths in subordinate SConscripts. Steve Reinhardt 2006-02-23 14:31:15 -05:00
  • 8fc06589cb Update functional memory to have a response event Ron Dreslinski 2006-02-23 13:51:54 -05:00
  • 9949ccf161 Cast enum to int to fix compile error from regression. Kevin Lim 2006-02-23 13:27:23 -05:00
  • cdb5fd9d12 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5 into zizzer.eecs.umich.edu:/z/stever/bk/m5 Steve Reinhardt 2006-02-23 08:17:09 -05:00
  • c13ea339dc Add pipe() syscall to Alpha Linux emulation. Steve Reinhardt 2006-02-23 08:16:59 -05:00
  • 8ed320792c Merge gblack@m5.eecs.umich.edu:/bk/multiarch into ewok.(none):/home/gblack/m5/multiarch Gabe Black 2006-02-23 04:11:09 -05:00
  • 5ecaaa0fb0 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5 into zizzer.eecs.umich.edu:/z/m5/Bitkeeper/multiarch Gabe Black 2006-02-23 04:08:55 -05:00
  • f462266b30 don't add an empty suboption description Nathan Binkert 2006-02-23 00:21:35 -05:00
  • 35094fb0fe make it possible to add filters for job names so that parts of the full crossproduct of jobs can be ignored. Nathan Binkert 2006-02-23 00:20:32 -05:00
  • cc60bc49e6 fix stat name Nathan Binkert 2006-02-23 00:00:01 -05:00
  • f67a99d1c9 Auto-generate arch/foo.hh "switch headers" in scons. Steve Reinhardt 2006-02-22 22:22:06 -05:00
  • 9a4c0f12ef Clean excess comments out of SConscripts. Steve Reinhardt 2006-02-22 21:11:45 -05:00
  • b37f5da98f Cleaned up the mapping of isa_parser.py inputs to outputs. Gabe Black 2006-02-22 20:52:03 -05:00
  • ceac38e41c Remove unneeded functions, moving code around abit. Ron Dreslinski 2006-02-22 17:43:08 -05:00
  • b403abfbdb Move the port from base memory object into the physical memory object. The Memory is now a pure virtual base class for all memory type objects (DRAM, physical). We should consider renaming MemObject to something more meaningful to represent it is for all memory heirarchy objects, perhaps MemHeirObject? Ron Dreslinski 2006-02-22 17:29:04 -05:00
  • 9bc7f13eeb make sure alpha still compiles , rename files back to original naming ... Korey Sewell 2006-02-22 04:08:08 -05:00
  • 2d2510e94f Still builds "../MIPS_SE/arch/mips/decoder.do with no errors! ----- uncomment out detailed model ... just commented to supress some compile errors Korey Sewell 2006-02-22 03:44:21 -05:00
  • 54b47bc5ae MIPS Compiles scons/MIPS_SE/arch/mips/decoder.do!!!!!! Korey Sewell 2006-02-22 03:33:35 -05:00
  • 0c2f55b585 Minor cleanup/fleshing out of Memory object. Steve Reinhardt 2006-02-21 22:17:00 -05:00
  • 7e927758d5 Temp fix for StaticInst::execute() methods while we're only trying to build SimpleCPU. Steve Reinhardt 2006-02-21 22:13:48 -05:00
  • 9c4e4a2181 Move op_class.hh out of encumbered/cpu/full and into cpu. Pull opClassStrings array out of encumbered/cpu/full/fu_pool.cc and move to new cpu/op_class.cc file. Steve Reinhardt 2006-02-21 22:12:27 -05:00
  • 37cd6695eb Merge zizzer:/bk/multiarch into zazzer.eecs.umich.edu:/z/ksewell/research/m5-sim/multiarch Korey Sewell 2006-02-21 22:06:18 -05:00
  • a4799a89de Renaming alpha files and changing some MIPS stuff to be more like Alpha version Korey Sewell 2006-02-21 22:02:05 -05:00
  • 8d80fd1477 Changed Fault * to Fault, which is a typedef to FaultBase *, which is the old Fault class renamed. Gabe Black 2006-02-21 20:10:40 -05:00
  • 1fff9f504f Some more changes for compilation. Since memset is now part of port and not virtual, no need for memory to define them. Ron Dreslinski 2006-02-21 20:04:23 -05:00
  • 4bd11c10a5 Add blocksize functions to physical memory. Fix the port we were using in the process loader. Ron Dreslinski 2006-02-21 13:39:01 -05:00
  • 944646124e Rename Port address range functions... like the block size functions, the send/recv*Query naming seems awkward. Also create a typedef for AddrRangeList. Steve Reinhardt 2006-02-21 12:32:45 -05:00
  • 00264ff1b8 Rename port methods: sendBlockSizeQuery() -> peerBlockSize() recvBlockSizeQuery() -> deviceBlockSize() After seeing how this gets used in practice, the send/recv*Query names just don't make a lot of sense. Steve Reinhardt 2006-02-21 12:20:02 -05:00
  • 8a753f6ae2 Move read/writeBlob functions to Port class; clean up implementation a little. Steve Reinhardt 2006-02-21 11:27:53 -05:00
  • 3f7979c99d Made Addr a global type Gabe Black 2006-02-21 03:38:21 -05:00
  • 00be4e8510 Thanks to Ali, I was able to add chunk generation code in to handle a few cases. Still have some duplicated code we may want to revisit. Ron Dreslinski 2006-02-21 03:32:42 -05:00
  • 562efe214c Adding some definitons for read/write blob/string. I need to locate te code stever wrote to break up address ranges into blk/page size chunks. Ron Dreslinski 2006-02-21 02:15:02 -05:00
  • 75152fcaf7 Get simple cpu to compile. Ron Dreslinski 2006-02-21 01:01:16 -05:00
  • 3391354285 Make loaders use translation port instead of proxy memory. Ron Dreslinski 2006-02-20 23:56:10 -05:00
  • 74d7cd1cea Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5 into zizzer.eecs.umich.edu:/z/m5/Bitkeeper/multiarch Gabe Black 2006-02-20 23:55:25 -05:00
  • 466284b5d2 Merge gblack@m5.eecs.umich.edu:/bk/multiarch into ewok.(none):/home/gblack/m5/multiarch Gabe Black 2006-02-20 23:54:38 -05:00
  • c226648459 Finished the implementing the change of the ISA from a class to a namespace Gabe Black 2006-02-20 23:53:14 -05:00
  • 3a0102536b Get rid of the code that delays PIO write accesses until the cache access occurs. The fundamental problem is that a subsequent read that occurs functionally will get a functionally incorrect result that can break driver code. Nathan Binkert 2006-02-20 23:41:50 -05:00
  • d96de69abc Add in a new translating port that allows syscalls to translate addresses via the page table before accessing the memory port. Ron Dreslinski 2006-02-20 23:26:39 -05:00
  • b74f1b829d Revert PageTable code back to non-asid version. Steve Reinhardt 2006-02-20 20:53:38 -05:00
  • bdf3fd92ba make MIPS specific Korey Sewell 2006-02-20 14:48:10 -05:00
  • 19534176e0 load/store instruction format ... now generates load/store code and breaks it into a separate EA and MemAccess templated from how the Alpha ARch. was coded to do the same thing. Korey Sewell 2006-02-20 14:30:23 -05:00
  • 38ce95db3b Support for All Jump Instructions ... Redo format for Branches and Jumps ( Must update NNPC not NPC ) Korey Sewell 2006-02-20 01:49:16 -05:00
  • 7c642b7106 Reapplied changes which were undone by a pull Gabe Black 2006-02-19 04:00:05 -05:00
  • f721a4d9ad Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5 into zizzer.eecs.umich.edu:/z/m5/Bitkeeper/multiarch Gabe Black 2006-02-19 03:20:05 -05:00
  • ed25d32617 Remade some changes which were undone Gabe Black 2006-02-19 03:04:44 -05:00
  • 0e4a80df1a Merge gblack@m5.eecs.umich.edu:/bk/multiarch into ewok.(none):/home/gblack/m5/multiarch Gabe Black 2006-02-19 02:34:52 -05:00
  • 463aa6d49d Changes to untemplate StaticInst and StaticInstPtr, change the isa to a namespace instead of a class, an improvement to the architecture specific header file selection system, and fixed up a few include paths. Gabe Black 2006-02-19 02:34:37 -05:00
  • 14f2cdb1a1 Merge zizzer:/bk/m5 into pb15.local:/Users/ali/work/m5.head Ali Saidi 2006-02-19 00:47:45 -05:00
  • 00d58aeb4d forgot a negative sign Ali Saidi 2006-02-19 00:28:53 -05:00