a43ae579dd
Merge with head.
Gabe Black
2009-08-17 00:21:57 -07:00
32c8514b45
X86: Fix a bug introduced to IDIV in a recent attempt to fix another bug.
Gabe Black
2009-08-17 00:20:03 -07:00
a6b39c07d9
code_formatter: Add a python class for writing code generator templates
Nathan Binkert
2009-08-16 13:40:03 -07:00
2ecaa99025
ply: add a base class called Grammar that encapsulates a ply grammar
Nathan Binkert
2009-08-16 13:40:01 -07:00
2334e6fdd5
orderdict: Use DictMixin and add orderdict to m5.util
Nathan Binkert
2009-08-16 13:40:00 -07:00
06c7ecb207
python: Make it possible to import the parts of m5 that are pure python
Nathan Binkert
2009-08-16 13:39:59 -07:00
e1270f81bd
ply: update PLY to version 3.2
Nathan Binkert
2009-08-16 13:39:58 -07:00
6654fe02da
Made servicing_atomic a counter and added started writes: a function for setting the flag to indicate that the rmw_writes started issuing
Polina Dudnik
2009-08-15 12:45:11 -05:00
a8e11cf3bb
Bug fix: indicate when writes started coming in
Polina Dudnik
2009-08-14 17:57:54 -05:00
ee3226d973
Merge with current branch
Polina Dudnik
2009-08-14 15:30:25 -05:00
0b0f47ec16
Added proc_id to CacheMsg for SMT.
Polina Dudnik
2009-08-14 15:30:07 -05:00
4b924fd16c
SMT atomics modifications: don't allow enquing from other threads if servicing and atomic for a thread
Polina Dudnik
2009-08-14 14:06:14 -05:00
bcaf93d182
Automated merge with ssh://hg@m5sim.org/m5
Derek Hower
2009-08-13 10:37:37 -05:00
33b063a2a7
X86: Update the stats on the ruby x86 regressions for the new CMOVcc implementation.
Gabe Black
2009-08-09 04:01:56 -07:00
c5fae51774
X86: Implement the CMPXCHG8B/CMPXCHG16B instruction.
Gabe Black
2009-08-09 01:01:41 -07:00
bbf117b20e
X86: Don't clobber the original dividend when doing signed divide.
Gabe Black
2009-08-09 01:01:18 -07:00
3b07a5829d
X86: Decode byte sized singed divide as byte sized.
Gabe Black
2009-08-09 01:00:47 -07:00
bcfc4178f5
X86: Update the stats for the slightly lengthened cmov.
Gabe Black
2009-08-08 17:23:25 -07:00
6e97feb8a5
X86: Make not taken conditional moves leave the destination alone. Adjust CMOVcc. The manuals from both AMD and Intel say that when writing to a 32 bit destination in 64 bit mode, the upper 32 bits of the register are filled with zeros. They also both say that the CMOV instructions leave their destination alone when their condition fails. Unfortunately, it seems that CMOV will zero extend its destination register whether or not it was supposed to actually do a move on both platforms. This seems to be the only case where this happens, but it would be hard to say for sure.
Gabe Black
2009-08-08 17:23:19 -07:00
b952eb19c1
bug fix for data_msg_size in network/Network.cc
Tushar Krishna
2009-08-07 13:59:40 -07:00
7c606e3835
X86: (Re)Implemented SHRD.
Gabe Black
2009-08-07 10:13:33 -07:00
4f5270f946
X86: Implement SHLD.
Gabe Black
2009-08-07 10:13:24 -07:00
3a55fc5cac
X86: Implement shift right/left double microops. This is my best guess as far as what these should do. Other existing microops use implicit registers, mul1s and mul1u for instance, so this should be ok. The microop that loads the implicit DoubleBits register would fall into one of the microop slots for moving to/from special registers.
Gabe Black
2009-08-07 10:13:20 -07:00
62a2e85c9a
X86: Make the qaud width bswap instruction handle the fact that 32 bit operations zero extend.
Gabe Black
2009-08-07 10:12:58 -07:00
0526f453aa
X86: Use the right field when using legacy prefixes to distinguish instructions.
Gabe Black
2009-08-07 10:12:52 -07:00
2daba26359
X86: Don't truncate the immediate parameter for the ENTER instruction.
Gabe Black
2009-08-07 10:12:29 -07:00
2e3446a410
X86: Adjust the various sizes used for the enter and leave instructions.
Gabe Black
2009-08-06 21:44:42 -07:00
c7b894a06f
X86: Make scas compare its operands in the right order.
Gabe Black
2009-08-06 21:44:41 -07:00
011c1865ad
X86: Fix a copy/paste error for cmovnp.
Gabe Black
2009-08-06 21:44:40 -07:00
60d4a0f6d7
Merge with head.
Gabe Black
2009-08-05 03:12:39 -07:00
da2df2fc25
X86: Make conditional moves zero extend their 32 bit destinations always.
Gabe Black
2009-08-05 03:07:55 -07:00
b64d0bdeda
X86: Fix condition code setting for signed multiplies with negative results.
Gabe Black
2009-08-05 03:07:01 -07:00
2914a8eb16
X86: Make the check for negative operands for sign multiply more direct.
Gabe Black
2009-08-05 03:06:37 -07:00
e2e0ae576a
X86: Make sure immediate values are truncated properly. Register values will be "picked" which will assure they don't have junk beyond the part we're using. Immediate values don't go through a similar process, so we should truncate them explicitly.
Gabe Black
2009-08-05 03:06:01 -07:00
ef3896d851
X86: Use the new forced folding mechanism for the SAHF and LAHF instructions.
Gabe Black
2009-08-05 03:04:17 -07:00
664d50b439
X86: Fix the indexing for ah in byte division instructions.
Gabe Black
2009-08-05 03:03:41 -07:00
abe8fb3844
X86: Fix the indexing for ah in byte multiply instructions.
Gabe Black
2009-08-05 03:03:28 -07:00
df1abc4412
X86: Let microops force folding an index into the high byte of a register.
Gabe Black
2009-08-05 03:03:07 -07:00
c4140d7d60
X86: Handle rotate left with carry instructions that go all the way around or more.
Gabe Black
2009-08-05 03:02:28 -07:00
3990445354
X86: Set the flags on rotate left with carry instructions.
Gabe Black
2009-08-05 03:02:05 -07:00
d265f7683e
X86: Handle rotate right with carry instructions that go all the way around or more.
Gabe Black
2009-08-05 03:01:49 -07:00
77dc6b33ee
X86: Fix the overflow bit for rotate right with carry.
Gabe Black
2009-08-05 03:01:23 -07:00
c8b1a4583e
X86: Fix the computation of the bottom part of rotate right with carry.
Gabe Black
2009-08-05 03:01:07 -07:00
bab4597fc5
X86: Fix the computation of the upper part of rotate right with carry.
Gabe Black
2009-08-05 03:00:43 -07:00
4e4adcaaa8
X86: Set the flags for rotate right with carry instructions.
Gabe Black
2009-08-05 03:00:23 -07:00
64d7948692
X86: Handle rotating right all the way around or more.
Gabe Black
2009-08-05 03:00:03 -07:00
88041f75c4
X86: Set the flags on a rotate right instruction.
Gabe Black
2009-08-05 02:59:39 -07:00
029d360db2
X86: Make shifts/rotations that write to 32 bits of a register zero extend.
Gabe Black
2009-08-05 02:59:25 -07:00
7f9a3af250
X86: Handle left rotations that go all the way around or more.
Gabe Black
2009-08-05 02:58:54 -07:00
99adfd9dae
X86: Actually set the flags on a rotate left instruction.
Gabe Black
2009-08-05 02:58:20 -07:00
c087b60af3
X86: Fix the sar carry flag.
Gabe Black
2009-08-05 02:58:03 -07:00
860f0f8350
X86: Fix sign extension when doing an arithmetic shift right by 0.
Gabe Black
2009-08-05 02:57:47 -07:00
a238959c34
X86: Fix the carry flag for shr.
Gabe Black
2009-08-05 02:56:49 -07:00