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bug fix for data_msg_size in network/Network.cc

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This commit is contained in:
Tushar Krishna
2009-08-07 13:59:40 -07:00
parent bd7af84d5e
commit b952eb19c1
17 changed files with 521 additions and 519 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/mem/protocol/MOESI_CMP_directory-L2cache.sm
View File

@@ -1389,7 +1389,7 @@ machine(L2Cache, "Token protocol") {
action(uu_profileMiss, "\u", desc="Profile the demand miss") {
peek(L1requestNetwork_in, RequestMsg) {
// AccessModeType not implemented
profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, machineIDToNodeID(in_msg.Requestor));
//profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, machineIDToNodeID(in_msg.Requestor));
}
}

2
src/mem/protocol/MOESI_CMP_token-L2cache.sm
View File

@@ -916,7 +916,7 @@ machine(L2Cache, "Token protocol") {
action(uu_profileMiss, "\u", desc="Profile the demand miss") {
peek(L1requestNetwork_in, RequestMsg) {
// AccessModeType not implemented
profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, machineIDToNodeID(in_msg.Requestor));
//profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, machineIDToNodeID(in_msg.Requestor));
}
}

2
src/mem/protocol/MSI_MOSI_CMP_directory-L2cache.sm
View File

@@ -978,7 +978,7 @@ machine(L2Cache, "MOSI Directory L2 Cache CMP") {
action(uu_profileMiss, "\u", desc="Profile the demand miss") {
peek(L1RequestIntraChipL2Network_in, RequestMsg) {
profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, L1CacheMachIDToProcessorNum(in_msg.RequestorMachId));
//profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, L1CacheMachIDToProcessorNum(in_msg.RequestorMachId));
}
}

1
src/mem/protocol/RubySlicc_Util.sm
View File

@@ -37,7 +37,6 @@ Time zero_time();
NodeID intToID(int nodenum);
int IDToInt(NodeID id);
int addressToInt(Address addr);
int MessageSizeTypeToInt(MessageSizeType size_type);
bool multicast_retry();
int numberOfNodes();
int numberOfL1CachePerChip();

2
src/mem/ruby/config/cfg.rb
View File

@@ -602,7 +602,7 @@ class Network < LibRubyObject
vec += " buffer_size "+buffer_size.to_s
vec += " link_latency "+adaptive_routing.to_s
vec += " on_chip_latency "+on_chip_latency.to_s
vec += " control_msg_size "+control_msg_size.to_s
end
def printTopology()

2
src/mem/ruby/config/defaults.rb
View File

@@ -82,6 +82,8 @@ class Network < LibRubyObject
# on chip latency
default_param :on_chip_latency, Integer, 1
default_param :control_msg_size, Integer, 8
end
class GarnetNetwork < Network

39
src/mem/ruby/network/Network.cc
View File

@@ -26,9 +26,44 @@ void Network::init(const vector<string> & argv)
m_adaptive_routing = (argv[i+1]=="true");
else if (argv[i] == "link_latency")
m_link_latency = atoi(argv[i+1].c_str());
else if (argv[i] == "control_msg_size")
m_control_msg_size = atoi(argv[i+1].c_str());
}
m_data_msg_size = RubySystem::getBlockSizeBytes() + m_control_msg_size;
assert(m_virtual_networks != 0);
assert(m_topology_ptr != NULL);
// printf ("HERE \n");
}
int Network::MessageSizeType_to_int(MessageSizeType size_type)
{
switch(size_type) {
case MessageSizeType_Undefined:
ERROR_MSG("Can't convert Undefined MessageSizeType to integer");
break;
case MessageSizeType_Control:
case MessageSizeType_Request_Control:
case MessageSizeType_Reissue_Control:
case MessageSizeType_Response_Control:
case MessageSizeType_Writeback_Control:
case MessageSizeType_Forwarded_Control:
case MessageSizeType_Invalidate_Control:
case MessageSizeType_Unblock_Control:
case MessageSizeType_Persistent_Control:
case MessageSizeType_Completion_Control:
return m_control_msg_size;
break;
case MessageSizeType_Data:
case MessageSizeType_Response_Data:
case MessageSizeType_ResponseLocal_Data:
case MessageSizeType_ResponseL2hit_Data:
case MessageSizeType_Writeback_Data:
return m_data_msg_size;
break;
default:
ERROR_MSG("Invalid range for type MessageSizeType");
break;
}
return 0;
}

41
src/mem/ruby/network/Network.hh
View File

@@ -71,6 +71,8 @@ public:
int getEndpointBandwidth() { return m_endpoint_bandwidth; }
bool getAdaptiveRouting() {return m_adaptive_routing; }
int getLinkLatency() { return m_link_latency; }
int MessageSizeType_to_int(MessageSizeType size_type);
// returns the queue requested for the given component
virtual MessageBuffer* getToNetQueue(NodeID id, bool ordered, int netNumber) = 0;
@@ -107,6 +109,8 @@ protected:
Topology* m_topology_ptr;
bool m_adaptive_routing;
int m_link_latency;
int m_control_msg_size;
int m_data_msg_size;
};
// Output operator declaration
@@ -123,41 +127,4 @@ ostream& operator<<(ostream& out, const Network& obj)
return out;
}
// Code to map network message size types to an integer number of bytes
const int CONTROL_MESSAGE_SIZE = 8;
const int DATA_MESSAGE_SIZE = (RubySystem::getBlockSizeBytes()+8);
extern inline
int MessageSizeType_to_int(MessageSizeType size_type)
{
switch(size_type) {
case MessageSizeType_Undefined:
ERROR_MSG("Can't convert Undefined MessageSizeType to integer");
break;
case MessageSizeType_Control:
case MessageSizeType_Request_Control:
case MessageSizeType_Reissue_Control:
case MessageSizeType_Response_Control:
case MessageSizeType_Writeback_Control:
case MessageSizeType_Forwarded_Control:
case MessageSizeType_Invalidate_Control:
case MessageSizeType_Unblock_Control:
case MessageSizeType_Persistent_Control:
case MessageSizeType_Completion_Control:
return CONTROL_MESSAGE_SIZE;
break;
case MessageSizeType_Data:
case MessageSizeType_Response_Data:
case MessageSizeType_ResponseLocal_Data:
case MessageSizeType_ResponseL2hit_Data:
case MessageSizeType_Writeback_Data:
return DATA_MESSAGE_SIZE;
break;
default:
ERROR_MSG("Invalid range for type MessageSizeType");
break;
}
return 0;
}
#endif //NETWORK_H

2
src/mem/ruby/network/garnet-fixed-pipeline/NetworkInterface_d.cc
View File

@@ -114,7 +114,7 @@ bool NetworkInterface_d::flitisizeMessage(MsgPtr msg_ptr, int vnet)
NetDest net_msg_dest = net_msg_ptr->getInternalDestination();
Vector<NodeID> dest_nodes = net_msg_dest.getAllDest(); // gets all the destinations associated with this message.
int num_flits = (int) ceil((double) MessageSizeType_to_int(net_msg_ptr->getMessageSize())/m_net_ptr->getNetworkConfig()->getFlitSize() ); // Number of flits is dependent on the link bandwidth available. This is expressed in terms of bytes/cycle or the flit size
int num_flits = (int) ceil((double) m_net_ptr->MessageSizeType_to_int(net_msg_ptr->getMessageSize())/m_net_ptr->getNetworkConfig()->getFlitSize() ); // Number of flits is dependent on the link bandwidth available. This is expressed in terms of bytes/cycle or the flit size
for(int ctr = 0; ctr < dest_nodes.size(); ctr++) // loop because we will be converting all multicast messages into unicast messages
{

2
src/mem/ruby/network/garnet-flexible-pipeline/NetworkInterface.cc
View File

@@ -109,7 +109,7 @@ bool NetworkInterface::flitisizeMessage(MsgPtr msg_ptr, int vnet)
NetworkMessage *net_msg_ptr = dynamic_cast<NetworkMessage*>(msg_ptr.ref());
NetDest net_msg_dest = net_msg_ptr->getInternalDestination();
Vector<NodeID> dest_nodes = net_msg_dest.getAllDest(); // gets all the destinations associated with this message.
int num_flits = (int) ceil((double) MessageSizeType_to_int(net_msg_ptr->getMessageSize())/m_net_ptr->getNetworkConfig()->getFlitSize() ); // Number of flits is dependent on the link bandwidth available. This is expressed in terms of bytes/cycle or the flit size
int num_flits = (int) ceil((double) m_net_ptr->MessageSizeType_to_int(net_msg_ptr->getMessageSize())/m_net_ptr->getNetworkConfig()->getFlitSize() ); // Number of flits is dependent on the link bandwidth available. This is expressed in terms of bytes/cycle or the flit size
for(int ctr = 0; ctr < dest_nodes.size(); ctr++) // loop because we will be converting all multicast messages into unicast messages
{

2
src/mem/ruby/network/simple/Switch.cc
View File

@@ -169,7 +169,7 @@ void Switch::printStats(ostream& out) const
int sum = message_counts[type].sum();
if (sum != 0) {
out << " outgoing_messages_switch_" << m_switch_id << "_link_" << link << "_" << type
<< ": " << sum << " " << sum * MessageSizeType_to_int(type)
<< ": " << sum << " " << sum * (RubySystem::getNetwork()->MessageSizeType_to_int(type))
<< " " << message_counts[type] << " base_latency: " << throttle_ptr->getLatency() << endl;
}
}

4
src/mem/ruby/network/simple/Throttle.cc
View File

@@ -275,8 +275,8 @@ int network_message_to_size(NetworkMessage* net_msg_ptr)
// Artificially increase the size of broadcast messages
if (BROADCAST_SCALING > 1) {
if (net_msg_ptr->getDestination().isBroadcast()) {
return (MessageSizeType_to_int(net_msg_ptr->getMessageSize()) * MESSAGE_SIZE_MULTIPLIER * BROADCAST_SCALING);
return (RubySystem::getNetwork()->MessageSizeType_to_int(net_msg_ptr->getMessageSize()) * MESSAGE_SIZE_MULTIPLIER * BROADCAST_SCALING);
}
}
return (MessageSizeType_to_int(net_msg_ptr->getMessageSize()) * MESSAGE_SIZE_MULTIPLIER);
return (RubySystem::getNetwork()->MessageSizeType_to_int(net_msg_ptr->getMessageSize()) * MESSAGE_SIZE_MULTIPLIER);
}

5
src/mem/ruby/slicc_interface/RubySlicc_Util.hh
View File

@@ -106,11 +106,6 @@ extern inline int addressToInt(Address addr)
return (int) addr.getLineAddress();
}
extern inline int MessageSizeTypeToInt(MessageSizeType size_type)
{
return MessageSizeType_to_int(size_type);
}
extern inline bool long_enough_ago(Time event)
{
return ((get_time() - event) > 200);

750
tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats
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File diff suppressed because it is too large Load Diff

132
tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/simerr
View File

@@ -1,4 +1,6 @@
["-r", "tests/configs/../../src/mem/ruby/config/MI_example-homogeneous.rb", "-p", "8", "-m", "1", "-s", "1024"]
Error: User specified set of debug components, but the RUBY_DEBUG compile-time flag is false.
Solution: Re-compile with RUBY_DEBUG set to true.
print config: 1
system.cpu1: completed 10000 read accesses @3663630
system.cpu2: completed 10000 read accesses @3663638
@@ -8,69 +10,69 @@ system.cpu3: completed 10000 read accesses @3698130
system.cpu4: completed 10000 read accesses @3701748
system.cpu6: completed 10000 read accesses @3704092
system.cpu0: completed 10000 read accesses @3742302
system.cpu2: completed 20000 read accesses @6788966
system.cpu7: completed 20000 read accesses @6816416
system.cpu5: completed 20000 read accesses @6822351
system.cpu4: completed 20000 read accesses @6824056
system.cpu1: completed 20000 read accesses @6825604
system.cpu3: completed 20000 read accesses @6829578
system.cpu6: completed 20000 read accesses @6857232
system.cpu0: completed 20000 read accesses @6872452
system.cpu5: completed 30000 read accesses @9928492
system.cpu2: completed 30000 read accesses @9933192
system.cpu7: completed 30000 read accesses @9950074
system.cpu4: completed 30000 read accesses @9965775
system.cpu6: completed 30000 read accesses @9978835
system.cpu0: completed 30000 read accesses @9993926
system.cpu1: completed 30000 read accesses @9994767
system.cpu3: completed 30000 read accesses @9996366
system.cpu5: completed 40000 read accesses @13012070
system.cpu2: completed 40000 read accesses @13044972
system.cpu7: completed 40000 read accesses @13077010
system.cpu4: completed 40000 read accesses @13081178
system.cpu1: completed 40000 read accesses @13100740
system.cpu0: completed 40000 read accesses @13111135
system.cpu6: completed 40000 read accesses @13147706
system.cpu3: completed 40000 read accesses @13153176
system.cpu5: completed 50000 read accesses @16120762
system.cpu2: completed 50000 read accesses @16176586
system.cpu7: completed 50000 read accesses @16213417
system.cpu4: completed 50000 read accesses @16219872
system.cpu6: completed 50000 read accesses @16231538
system.cpu1: completed 50000 read accesses @16246976
system.cpu3: completed 50000 read accesses @16276612
system.cpu0: completed 50000 read accesses @16293234
system.cpu5: completed 60000 read accesses @19263804
system.cpu4: completed 60000 read accesses @19313220
system.cpu2: completed 60000 read accesses @19330470
system.cpu7: completed 60000 read accesses @19340197
system.cpu6: completed 60000 read accesses @19399766
system.cpu0: completed 60000 read accesses @19424570
system.cpu1: completed 60000 read accesses @19425712
system.cpu3: completed 60000 read accesses @19444952
system.cpu5: completed 70000 read accesses @22408750
system.cpu4: completed 70000 read accesses @22449746
system.cpu7: completed 70000 read accesses @22451736
system.cpu2: completed 70000 read accesses @22461052
system.cpu0: completed 70000 read accesses @22554296
system.cpu1: completed 70000 read accesses @22555310
system.cpu3: completed 70000 read accesses @22588935
system.cpu6: completed 70000 read accesses @22602456
system.cpu5: completed 80000 read accesses @25540598
system.cpu4: completed 80000 read accesses @25577430
system.cpu7: completed 80000 read accesses @25617532
system.cpu1: completed 80000 read accesses @25644879
system.cpu2: completed 80000 read accesses @25660256
system.cpu0: completed 80000 read accesses @25710799
system.cpu3: completed 80000 read accesses @25716714
system.cpu6: completed 80000 read accesses @25776606
system.cpu5: completed 90000 read accesses @28693458
system.cpu4: completed 90000 read accesses @28705416
system.cpu7: completed 90000 read accesses @28729734
system.cpu1: completed 90000 read accesses @28778532
system.cpu2: completed 90000 read accesses @28801770
system.cpu0: completed 90000 read accesses @28857559
system.cpu6: completed 90000 read accesses @28885159
system.cpu3: completed 90000 read accesses @28894168
system.cpu7: completed 100000 read accesses @31814464
system.cpu2: completed 20000 read accesses @6778081
system.cpu7: completed 20000 read accesses @6787708
system.cpu3: completed 20000 read accesses @6819995
system.cpu6: completed 20000 read accesses @6825022
system.cpu5: completed 20000 read accesses @6833343
system.cpu4: completed 20000 read accesses @6836578
system.cpu1: completed 20000 read accesses @6842472
system.cpu0: completed 20000 read accesses @6879216
system.cpu6: completed 30000 read accesses @9933568
system.cpu7: completed 30000 read accesses @9937112
system.cpu2: completed 30000 read accesses @9954336
system.cpu3: completed 30000 read accesses @9954652
system.cpu4: completed 30000 read accesses @9954804
system.cpu0: completed 30000 read accesses @9956400
system.cpu1: completed 30000 read accesses @9969148
system.cpu5: completed 30000 read accesses @9971642
system.cpu4: completed 40000 read accesses @13043407
system.cpu2: completed 40000 read accesses @13067576
system.cpu0: completed 40000 read accesses @13084396
system.cpu7: completed 40000 read accesses @13093378
system.cpu6: completed 40000 read accesses @13094121
system.cpu3: completed 40000 read accesses @13100062
system.cpu5: completed 40000 read accesses @13106812
system.cpu1: completed 40000 read accesses @13156070
system.cpu7: completed 50000 read accesses @16206554
system.cpu2: completed 50000 read accesses @16208768
system.cpu0: completed 50000 read accesses @16212192
system.cpu4: completed 50000 read accesses @16217948
system.cpu3: completed 50000 read accesses @16256632
system.cpu1: completed 50000 read accesses @16263536
system.cpu5: completed 50000 read accesses @16271570
system.cpu6: completed 50000 read accesses @16283656
system.cpu0: completed 60000 read accesses @19290853
system.cpu2: completed 60000 read accesses @19315578
system.cpu7: completed 60000 read accesses @19378042
system.cpu1: completed 60000 read accesses @19380549
system.cpu4: completed 60000 read accesses @19394866
system.cpu3: completed 60000 read accesses @19403114
system.cpu6: completed 60000 read accesses @19417031
system.cpu5: completed 60000 read accesses @19417566
system.cpu2: completed 70000 read accesses @22372583
system.cpu0: completed 70000 read accesses @22441747
system.cpu1: completed 70000 read accesses @22499937
system.cpu6: completed 70000 read accesses @22512662
system.cpu5: completed 70000 read accesses @22534921
system.cpu7: completed 70000 read accesses @22545974
system.cpu3: completed 70000 read accesses @22559233
system.cpu4: completed 70000 read accesses @22609844
system.cpu2: completed 80000 read accesses @25417738
system.cpu0: completed 80000 read accesses @25565987
system.cpu1: completed 80000 read accesses @25571759
system.cpu5: completed 80000 read accesses @25633062
system.cpu6: completed 80000 read accesses @25674790
system.cpu7: completed 80000 read accesses @25684920
system.cpu3: completed 80000 read accesses @25708114
system.cpu4: completed 80000 read accesses @25737082
system.cpu2: completed 90000 read accesses @28501358
system.cpu1: completed 90000 read accesses @28680540
system.cpu0: completed 90000 read accesses @28689988
system.cpu6: completed 90000 read accesses @28771148
system.cpu5: completed 90000 read accesses @28782038
system.cpu7: completed 90000 read accesses @28806422
system.cpu3: completed 90000 read accesses @28840020
system.cpu4: completed 90000 read accesses @28843088
system.cpu2: completed 100000 read accesses @31633980
hack: be nice to actually delete the event here

12
tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/simout
View File

@@ -1,3 +1,5 @@
Redirecting stdout to build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby/simout
Redirecting stderr to build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby/simerr
M5 Simulator System
Copyright (c) 2001-2008
@@ -5,11 +7,11 @@ The Regents of The University of Michigan
All Rights Reserved
M5 compiled Jul 29 2009 15:19:07
M5 revision a6e8795b73de+ 6384+ default tip
M5 started Jul 29 2009 15:19:16
M5 executing on clover-02.cs.wisc.edu
M5 compiled Aug 7 2009 11:05:15
M5 revision e34c4d587f38 6440 default qtip qbase tip tushar/ruby-data_msg_size-bug-fix
M5 started Aug 7 2009 11:05:38
M5 executing on ca2h0439
command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby -re tests/run.py build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 31814464 because maximum number of loads reached
Exiting @ tick 31633980 because maximum number of loads reached

40
tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt
View File

@@ -1,34 +1,34 @@
---------- Begin Simulation Statistics ----------
host_mem_usage 1538672 # Number of bytes of host memory used
host_seconds 1279.29 # Real time elapsed on the host
host_tick_rate 24869 # Simulator tick rate (ticks/s)
host_mem_usage 1507500 # Number of bytes of host memory used
host_seconds 3347.37 # Real time elapsed on the host
host_tick_rate 9450 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_seconds 0.000032 # Number of seconds simulated
sim_ticks 31814464 # Number of ticks simulated
sim_ticks 31633980 # Number of ticks simulated
system.cpu0.num_copies 0 # number of copy accesses completed
system.cpu0.num_reads 99342 # number of read accesses completed
system.cpu0.num_writes 53699 # number of write accesses completed
system.cpu0.num_reads 99389 # number of read accesses completed
system.cpu0.num_writes 53397 # number of write accesses completed
system.cpu1.num_copies 0 # number of copy accesses completed
system.cpu1.num_reads 99812 # number of read accesses completed
system.cpu1.num_writes 53757 # number of write accesses completed
system.cpu1.num_reads 99316 # number of read accesses completed
system.cpu1.num_writes 52916 # number of write accesses completed
system.cpu2.num_copies 0 # number of copy accesses completed
system.cpu2.num_reads 99597 # number of read accesses completed
system.cpu2.num_writes 53671 # number of write accesses completed
system.cpu2.num_reads 100000 # number of read accesses completed
system.cpu2.num_writes 53389 # number of write accesses completed
system.cpu3.num_copies 0 # number of copy accesses completed
system.cpu3.num_reads 99365 # number of read accesses completed
system.cpu3.num_writes 53444 # number of write accesses completed
system.cpu3.num_reads 98794 # number of read accesses completed
system.cpu3.num_writes 53127 # number of write accesses completed
system.cpu4.num_copies 0 # number of copy accesses completed
system.cpu4.num_reads 99713 # number of read accesses completed
system.cpu4.num_writes 54044 # number of write accesses completed
system.cpu4.num_reads 98918 # number of read accesses completed
system.cpu4.num_writes 53609 # number of write accesses completed
system.cpu5.num_copies 0 # number of copy accesses completed
system.cpu5.num_reads 99943 # number of read accesses completed
system.cpu5.num_writes 53789 # number of write accesses completed
system.cpu5.num_reads 99006 # number of read accesses completed
system.cpu5.num_writes 53467 # number of write accesses completed
system.cpu6.num_copies 0 # number of copy accesses completed
system.cpu6.num_reads 99307 # number of read accesses completed
system.cpu6.num_writes 53603 # number of write accesses completed
system.cpu6.num_reads 99283 # number of read accesses completed
system.cpu6.num_writes 53587 # number of write accesses completed
system.cpu7.num_copies 0 # number of copy accesses completed
system.cpu7.num_reads 100000 # number of read accesses completed
system.cpu7.num_writes 53881 # number of write accesses completed
system.cpu7.num_reads 99099 # number of read accesses completed
system.cpu7.num_writes 53320 # number of write accesses completed
---------- End Simulation Statistics ----------