Commit Graph

19980 Commits

Author SHA1 Message Date
Melissa Jost
c127a38f48 base: Use <experimental/filesystem> include for GCC v7
This change adds include guards to the inclusion of the
filesystem module to ensure GCC 7 can work properly,
addressing an issue in the compiler tests.

Change-Id: I642f79bd801baf4766572368b9339e34be46d1c3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69840
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2023-04-19 21:54:46 +00:00
Yen-lin Lai
e7ae5290f5 base: Fix VNC server initialization
In a previous commit, the initialization of dataFd to -1 is removed.
Add it back so VNC server can properly accept connection.

Fixes: 67fb75d659 ("base,cpu,dev,sim: Pull common logic into ListenSocket::listen().")
Change-Id: I4246d1fddc766cb190a04d4f984fc1ce73af3fb0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69757
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2023-04-19 05:42:24 +00:00
Hoa Nguyen
09023d4158 mem-ruby: Not flushing data to memory when there's no dirty block
Currently, taking a checkpoint with a ruby cache involves moving all
the dirty data in cache to memory. This is done by keeping **only**
simulating the cache until all dirty data are flushed to the memory
before taking the checkpoint.

However, when the cache does not have dirty data, it is a problem if
we keep simulating the cache. E.g., calling checkpoint caused the gem5
"empty event queue" assertion fault when running the ruby cache in
atomic_noncaching mode. Since the mode bypasses the cache, all blocks
are invalid and do not contain dirty data. Subsequently, there is no
event placed to the event queue when we keep **only** simulating the
cache before taking the checkpoint.

This patch fixes this problem by checking if there is any actionable
item when trying to move dirty data to memory. If there is no block
contains dirty data, we simply choose not to continue simulating the
cache before taking the checkpoint.

Change-Id: Idfa09be51274c7fc8a340e9e33167f5b32d1b866
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69897
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2023-04-17 21:51:43 +00:00
Bobby R. Bruce
76d1d024da stdlib: Fix SwitchableProcessor use in SE mode
The SwitchableProcessors in the standard library have switched-in and
switched-out cores. The `get_cores` API in the stdlib only returns
switched-in cores. In most uses this is desirable.

In the case of setting workloads in SE mode it's necessary to set the
workload to every core, switched-in and switched-out. As the `get_cores`
function was used for this, SwitchableProcessors were failing when used
in SE Mode.

This patch checks the processor type and, if a SwitchableProcessor, uses
the SwitchableProcessor's special `_all_cores` function which gets all
the cores, regardless as to their switched-in/switched-out status.

Issue-on: https://gem5.atlassian.net/browse/GEM5-1320

Change-Id: I0b7a699ac6196e827667955bef7afa37b2648744
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68997
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2023-04-17 16:32:13 +00:00
Hoa Nguyen
851e469e55 scons: Add "--no-duplicate-sources" option to SConstruct in util/
Patch [1] caused building util/m5 to fail due to the flag was not
an option in the SConstruct file. It is apparently the case for other
programs in util/ relying on scons.

This patch fixes the above problem, and also adheres to the default
behavior introduced by [2].

[1] This patch introduced the "--no-duplicate-sources" flag to the
scons build in util/
https://gem5-review.googlesource.com/c/public/gem5/+/68518

[2] This patch turns this flag off by default,
https://gem5-review.googlesource.com/c/public/gem5/+/69717

Change-Id: I51376f7b3bf06438b7bc7ff84bc599deecac5bd1
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69797
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Alex Richardson <alexrichardson@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
2023-04-14 05:31:03 +00:00
Richard Cooper
9ec1b93980 configs: Add --exit-on-uart-eot flag to Arm baremetal.py config
Many benchmarks signal their termination by writing an EOT character
to the UART. This change adds an option to the Arm `baremetal.py`
example script to exit the simulation when an EOT character is
detected on any of the UARTs.

Change-Id: Ibfce9800c47090714258dbdbc5d6cee5ee6fb952
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69688
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-13 21:09:36 +00:00
Richard Cooper
80eb8be3cf configs: Update Arm simple configs to enable --interactive option
Removed the calls to `sys.exit()` from the Arm simple configs. These
calls terminate gem5's embedded Python interpreter and gem5 at the end
of the config script, preventing gem5 from dropping into the
interactive IPython shell when the `--interactive` option has been
specified.

Change-Id: I0c350b0d107f297691255361d25c566c889f9469
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69687
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-13 21:09:36 +00:00
Richard Cooper
c8496d8c4d configs: Add the O3 CPU as an option to baremetal.py
Adds the O3_ARM_v7a CPU model as an extra option for the `--cpu-type`
to `configs/example/arm/baremetal.py`.

Change-Id: I717b168945bec22fb5ae17e37c2854df844bcb4f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69686
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
2023-04-13 21:09:36 +00:00
Richard Cooper
5138092607 configs: Make the configuration of the gicv4 parameter robust
Only the GICv3 model has a `gicv4` parameter, causing the current
`baremetal.py` config to throw an exception when used with the
VExpress_GEM5_V1 platform containing a GICv2.

This patch checks for the existence of the `gicv4` parameter, allowing
all VExpress platforms to be used.

Change-Id: I72667a9caee64fa497bda516217cd424050eb242
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69685
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
2023-04-13 21:09:36 +00:00
Richard Cooper
a83f699f1d configs: Add Tarmac tracing option to the simple Arm configs
gem5 supports Tarmac trace generation for Arm simulations, but there
are no examples of how to use this feature.

This patch adds a `--tarmac-gen` option to three of the simple Arm
configs. Tarmac generation is useful for out-of-the-box users, and
this patch also provides an example of how to use the Tarmac
generation feature.

Change-Id: I0d3c523b5c0bb6d94de93bc502e4451622fb635d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69684
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-13 21:09:36 +00:00
Richard Cooper
324ac185c8 arch-arm: Add an option to use 64-bit PMU counters
Add support for 64-bit PMU counter registers (PMEVCNTR<n>_EL0), as
specified in Armv8-A.

The counter registers are 32-bit by default, but 64-bit counters can
be chosen using the `ArmPMU.use64bitCounters` parameter.

Change-Id: Idb838a7438c7711438a7e078278bed21710049af
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69683
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
2023-04-13 21:09:36 +00:00
Richard Cooper
ed9effca73 dev-arm: Fix writes to Arm GICv2 GICD_IGROUPRn
Writes to the GICD_IGROUPRn registers are currently applied using the
`|=` operator, allowing bits to be set but not cleared. According to
the specification [1] this register should allow direct writes.

This patch changes the logic to write the new value directly to the
register.

[1] https://developer.arm.com/documentation/ihi0048/latest/

Change-Id: Ia5f17d05530263d7e918ff33576daaf8165c25c2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69682
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-13 21:09:36 +00:00
Richard Cooper
06637a29e5 arch-arm: Add more detailed debug messages to GICv2.
Converted the generic DPRINTF messages for the GICv2 register reads
and writes (showing only the memory mapped address) to finer grained
DPRINTF messages showing the names of the mapped registers being
accessed.

This change is intended to make it easier to debug the GIC setup from
the gem5 debug trace.

Change-Id: Ic418b2ea8438fed6a5a810ebc0b686cd4c891cb0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69681
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2023-04-13 21:09:36 +00:00
Richard Cooper
27aab0fb35 arch-arm: Fix formatting of v8 Tarmac Register records
The Tarmac v8 Register ("R") record serialisation formats the
underlying 64-bit storage using a format string field width specifier.
This sets a minimum number of hex characters for the value, rather
than a maximum number of characters.

Because of this, when formatting a narrowed view of a larger
register (e.g. the 32-bit w0 view of the 64-bit x0 register), if any
of the upper bits in the underlying storage are set, then the number
of hex characters used will be the minimum number required to
represent the full value. This could result in irregular formatting,
for example an odd number of hex characters.

This irregular formatting can cause parsing warnings or failures in
some Tarmac tools, for example the Arm Tarmac Trace Utilities [1].

This patch modifies the "R" record formatting to first mask off the
upper bits of the value in the underlying storage to ensure that the
correct number of hex characters are used for the size of the register
being serialised.

[1] https://github.com/ARM-software/tarmac-trace-utilities

Change-Id: Idbd80553d3bcdb56fa9edddd48440ab7d4dff073
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69680
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-13 21:09:36 +00:00
Richard Cooper
dcc14ba948 configs: Update Arm starter_se.py for new CpuCluster abstraction
Changeset [1] introduced a new CpuCluster abstraction. This requires
some changes to the Arm `starter_se.py` and `devices.py`
configurations to accommodate the new structure.

[1] https://gem5-review.googlesource.com/c/public/gem5/+/65891

Change-Id: I55fdd383c96286d179724e0f50771e2b5daaa6d7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69679
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-13 21:09:36 +00:00
Richard Cooper
d02cba93c3 cpu: Add CpuCluster method to allow querying the number of CPUs.
Add a `__len__` method to `CpuCluster` to allow clients to query the
number of CPUs.

Change-Id: I6fe680423ed6fc301faaf75b8685b080a4774fef
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69678
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2023-04-13 21:09:36 +00:00
Bobby R. Bruce
640891ac41 scons: Fix "no-duplicate-sources" to include .hh when not set
A flag, introduced in this patch:
https://gem5-review.googlesource.com/c/public/gem5/+/68518
allowed users to pass "no-duplicate-sources" to a gem5 compilation to
not symlink sources in the build directory.

In this patch "src" was added as a shared top-level header directory.
This means that the header files are not copied to the "build" directory
whether or not "no-duplicate-sources" is set.

This patch ensures the "src" directory is only added as a shared
top-level headers directory in the case where "no-duplicate-sources" is
set.

In addition, the "duplicate_sources" parameter (the destination for the
"no-duplicate-sources") was "None" by default, and only set to False
when the flag was used. `default=True` has been added so
"duplicate_sources" can be used as a boolean.

This bug was a cause of a Nightly build error:
https://jenkins.gem5.org/job/nightly/570

In this error, building ext/sst resulted in an error as the Makefile
depends on adding "build/RISCV" to the include path. Without the header
files in the "build" directory, building SST failed. Though, ext/stt
should probably not be using header files in the "build/RISCV"
directory. This will be fixed in another change.

Change-Id: I786486a177fe17a67f3b939c539eecdcbfcaeaf2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69717
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-13 17:19:06 +00:00
Richard Cooper
d95890d2a7 python: Fix broken call to m5.fatal in _check_tracing()
The call to m5.fatal in _check_tracing() fails because it has not been
imported at this point.

Change-Id: I60b1de6128d0ffc29e03e9ed98a8f9f679ef0ff9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50447
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-13 09:52:31 +00:00
Roger Chang
6c4f405669 arch-riscv: Insert symbol table of bootloader into debug symbol table
in bare metal workload

Change-Id: Iea2ded4e72070b7b3b588000e1082180269e9e5e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69697
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
2023-04-13 00:10:47 +00:00
Gabe Black
0af4b60acb base: fatal() if a socket path doesn't fit in sockaddr_un.sun_path.
Normally this would just generate a warning, but a warning is easy to
miss, and truncating the path to fit would be surprising. Since the max
length isn't likely to change, a path which has to be truncated is
essentially fundementally wrong, and could be defined as something
else which is short enough before being used in the config.

Note that this only applies to either the abstract path which is just
a string, or the file name and not the directory path on a file based
socket.

Change-Id: I8702cf02c03053b5d0b6133f25b0e588de666f15
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69677
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Earl Ou <shunhsingou@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-12 11:55:31 +00:00
Gabe Black
716c154b51 arch,base,dev,sim: Convert objects to use the HostSocket param type.
This will make it possible to connect any of these objects with a
named socket, in addition to the usual port numbers.

Change-Id: Id441c3628f62d60608a07c5cb697786e33199981
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69166
Reviewed-by: Jui-min Lee <fcrh@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
2023-04-12 02:18:22 +00:00
Gabe Black
2a44f3bfc7 base: Remove the now unused UnixSocketAddr class and associated code.
This job is now handled by the python param code, and the ListenSocket
classes.

Change-Id: I3a29b880b2484c5e25071bdef59fc73e1e8c2760
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69169
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Simon Park <seminpark@google.com>
2023-04-11 21:14:54 +00:00
Gabe Black
57aaccdeff base,python: Add a param type for host sockets.
These can either be set to an integer, in which case it's interpreted
as a TCP port, or a string, in which case it's treated as a unix domain
socket. If the unix domain socket is prefixed with a "@", it will be
treated as an abstract socket.

When stored in the ini file, there is always a prefix added to make
parsing the string more systematic and less ambiguous. A port number is
prefixed with "#", an abstract socket with "@", and a socket file with
the prefix "P" for "path".

Change-Id: I1fc7a579074e849b3becd936238c62fb0d9a2087
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69165
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-11 09:11:34 +00:00
Roger Chang
e4a46cb09d arch-riscv: Refactor the shouldCheckPMP function
The shouldCheckPMP can be simply with pmode != PRV_M since the
privilege mode of memory is modified by TLB and Walker. The
numRules check can done in shouldPMPCheck

Change-Id: I842687674fed7bc4d88a9ba6b4c4d52c3459068f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69497
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
2023-04-11 08:43:47 +00:00
Roger Chang
e37b1d1d92 arch-riscv: Fix the address check of pmp
Fix the AddrRange of pmp region. the contains of AddrRange(start, end)
will be valid if the address y is in start <= y < end. It should not
minus 1 in end parameter.

Change-Id: I1a0eb51f2d5881b8aa90d310884922b16f2019fb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69577
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
2023-04-11 08:43:30 +00:00
Gabe Black
f9cf3de711 mem: Use HostSocket in the SharedMemoryServer.
Use a HostSocket parameter to accept connections, rather than a hand
implementation for unix domain sockets. This consolidates this code
with the code derived from it in ListenSocket, and also makes it
possible to connect to the SharedMemoryServer over an AF_INET socket.

Change-Id: I8e05434d08cffaebdf6c68a967e2ee7613c10a76
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69168
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jui-min Lee <fcrh@google.com>
2023-04-11 07:34:32 +00:00
Bobby R. Bruce
e79d6616dd base: Use <experimental/filesystem> include for GCC v7
gem5 officially supports GCC 7+. In GCC 7 the "filesystem" module was
added but only in the "experimental" namespace as
"<experimental/filesystem>". In GCC 8+ the module can be found as
"<filesystem>".

Because of this, include guards to handle this. They include
"<experimental/filesystem>" for the GCC v7 case and the "<filesystem>"
for all other versions.

This bug was partially responsible for this compiler tests failures:
https://jenkins.gem5.org/job/compiler-checks/570

Note: gem5 does not support GCC versions <7. Thus the
"#if __GNUC__ >=8 <GCC 8+ code> #else <GCC 7 code> #endif" logic is
valid.

Change-Id: I31db5488f272f9652edebf24ecefca3722369076
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69598
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2023-04-11 06:08:23 +00:00
Bobby R. Bruce
1258f481c9 scons: Add '-lstdc++fs' to LIBS env when GCC version < 9
This commit is in response to a failure in the compiler tests:
https://jenkins.gem5.org/job/compiler-checks/570/

GCC versions <9 failed to compile gem5 with the following error:

```
socket.cc:(.text+0x32d5): undefined reference to `std::filesystem::__cxx11::path::_M_split_cmpts()'
socket.cc:(.text+0x32e5): undefined reference to `std::filesystem::create_directory(std::filesystem::__cxx11::path const&, std::error_code&)'
socket.cc:(.text+0x3370): undefined reference to `std::filesystem::current_path[abi:cxx11](std::error_code&)'
socket.cc:(.text+0x33cc): undefined reference to `std::filesystem::__cxx11::path::_M_split_cmpts()'
socket.cc:(.text+0x33d7): undefined reference to `std::filesystem::current_path(std::filesystem::__cxx11::path const&, std::error_code&)'
socket.cc:(.text+0x3468): undefined reference to `std::filesystem::current_path(std::filesystem::__cxx11::path const&, std::error_code&)'
```

This was due to this patch:
https://gem5-review.googlesource.com/c/public/gem5/+/69164 which
utilized `std::filesystem`. Prior to to GCC v9, explicit linking with
the stdc++fs library is required due to `std::filesystem` being an
experimental implementation prior to GGC v9.

Change-Id: I584e29f100cb59b40bd155c212e1814f6d8fbb99
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69597
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2023-04-11 06:08:23 +00:00
Gabe Black
7eff90acdc base: Add support for unix domain sockets in ListenSocket.
Change-Id: I6a5fa2cd3e4b567829203bf9d61ad2b55c259697
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69164
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jui-min Lee <fcrh@google.com>
2023-04-10 02:42:37 +00:00
Melissa Jost
f15ddf8206 configs: Fix RISCVMatched Test
Updated the import of the RISCVMatchedBoard so there would be
no more errors calling it.

Change-Id: I2dda4783edaa18851269860757d5b8ee58625838
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69458
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2023-04-08 21:49:02 +00:00
Gabe Black
5a943ce5a5 util: Add a missing free() to m5term.
The "cwd" string is used to store the previous working directory, if
m5term needs to change it to maximize the space it has to create a
unix domain socket using a relative path. That string was not being
freed, which is a small memory leak. This change frees that memory.

Change-Id: I1ad901e7c59614dd938165cae91c3f666d86e872
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69557
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2023-04-08 20:47:04 +00:00
HJikram
d632bba119 stdlib: small fix in spec-2006 and spec-2007
I modified the spec-2017 benchmark file to include a
processor.switch() statement (which had been removed
in an earlier commit). I also replaced the use of
get_roi_ticks() with get_tick_stopwatch() as this
particular workload is not annotated with "workbegin"
and "workend" annotations.

Lastly, I fixed a minor bug in the spec-2006 file
which printed the total simulated ticks as zero due
to incorrect indexing of get_tick_stopwatch().

Change-Id: If0b6f88d6701a11f32e2e69994582524e0d7097b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69537
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2023-04-08 10:35:45 +00:00
Gabe Black
2f5c87c7c6 dev: Add an "abortPending" method to the DMA port class.
This will abort any pending transactions that have been given to the
port.

Change-Id: Ie5f2c702530656a0c4590461369d430abead14cd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69437
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
2023-04-08 08:02:30 +00:00
Wei-Han Chen
c98d0d2f93 base: Add missing headers in extensible.hh
Add missing headers <cassert> and <type_traits> in extensible.hh

Change-Id: I01e49c62619383ea4f7da668ceaefe4a41418cd8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69480
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
2023-04-08 01:21:48 +00:00
Gabe Black
179dfe521b util: Make m5term able to connect to unix domain sockets.
To connect to a unix domain socket, it must start with a non-digit
character to avoid being confused with a TCP port. If it starts with an
"@" character, then it is treated as an abstract socket.

Change-Id: I3a71eb8ef80018546f3bbf9d781770bd37ecec09
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69167
Reviewed-by: Jui-min Lee <fcrh@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-06 01:13:04 +00:00
Alex Richardson
5e096f5b5d scons: allow building without duplicating source files
This adds a new scons flag --no-duplicate-sources to build without
linking source files to the build directory.

I find this very helpful when using CLion, since I can now generate a
compilation database using
`bear scons build/ALL/gem5.debug --no-duplicate-sources` and CLion will
now correctly semantically analyze all the files inside src/.
It also ensures that clicking on a build warning/error now opens the
real source file rather than a symlink.

This is not enabled by default since it's possible that certain use
cases are not working correctly, but the basic testing I've done so
far appears to work just fine.

It appears that with this change the `<root>/src` directory is no longer
added to `PYTHONPATH` when running `tests/main.py`, so this change
depends on https://gem5-review.git.corp.google.com/c/public/gem5/+/68757

Change-Id: Iddc9bf9c8211e68e5432c0a07f5c95f427c1ca16
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68518
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2023-04-05 22:00:07 +00:00
Gabe Black
c00e3b2570 base: Abstract the AF_INET-ness out of ListenSocket.
Put them into a subclass called ListenSocketInet.

Change-Id: I035621463a7f799c1d36a500ed933dc056238e5e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69163
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jui-min Lee <fcrh@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2023-04-05 06:58:04 +00:00
Matt Sinclair
ea623eb6e5 mem-ruby: fix whitespacing errors in RubySystem
These errors cause other commits to fail pre-commit

Change-Id: I379d2d7c73f88d0bb35de5aaa7d8cb70a83ee1dd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69397
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2023-04-05 04:19:50 +00:00
HJikram
f7f5b68202 stdlib: Small fix in stdlib spec2006 script
The call to processor switch from KVM to TIMING was
removed in an earlier commit. This change fixes that.
Also, get_roi_ticks() doesn't work because spec2006
does not have work_begin and work_exit annotations.
This change uses get_tick_stopwatch() to calculate
the roi ticks.

Change-Id: I55efe28ebd686cb4e6c88a528533127fb73c88ed
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69357
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-04 11:25:22 +00:00
Bobby R. Bruce
59ea30913f arch-sparc: Rewrite unused array in tgt_stat64 for mac
On Mac (tested on Mac Mini M2 Pro) the src/arch/sparc/linux/linux.hh was
uncompilable due to `int64_t __unused[3]` not working with the Mac
GLIB's `__unused` definition. This was therefore rewritten.

Change-Id: I8094a54ccf8dedb8e63ef05770e48eef7012262c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68838
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Melissa Jost <mkjost@ucdavis.edu>
2023-04-04 00:06:03 +00:00
Vishnu Ramadas
8b7e55339a dev-amdgpu: Add GART translations to GPUFS checkpoint
Earlier, the GART entries were not being checkpointed. Therefore, during
checkpoint restore, certain SDMA instances were initialized with
incorrect addresses that led to incorrect behavior. This commit
checkpoints the GART entries and restores them.

Change-Id: I5464a39ed431e482ff7519b89bd5b664fd992ccf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69299
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-03 22:29:10 +00:00
Vishnu Ramadas
65e0bd6eb4 dev-amdgpu: Added PM4MapQueues to GPUFS checkpoint
The GPUFS checkpoint restoration mechanism expects to find a
PM4MapQueues packet in the checkpoint. Since this was not being
checkpointed, the restore phase retrieved a null packet which led to a
segmentation fault. This commit adds PM4MapQueues to the checkpoint and
restores it when deserializing the checkpoint

Change-Id: Ib74a9f36fe89d740a74f94314ada41ecc363abe9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69298
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
2023-04-03 22:28:57 +00:00
Melissa Jost
ee2be9cffe tests: Update nightly SystemC test
The SystemC test requires gem5 to be built with the minimum
dependencies image, and it was also updated to properly use
se.py since it has now been deprecated.

Change-Id: I1223afd70f105073d2cd4a2a78135f1f935c06ec
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69337
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-30 21:01:42 +00:00
Bobby R. Bruce
5361da58be tests: Fix the nightly SST and SystemC tests
These tests were only returning the exit-code of the last command in the
bash script, which would silence failures in commands prior to that.
This patch fixes this. Now these tests will return a non-zero exit code
for any failure when executing these bash scripts.

Change-Id: I2195bbd0357f0b38c192ab5f9e8ad68101786247
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68677
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-30 21:01:42 +00:00
Melissa Jost
1ff3ea2a09 tests: Fix failing SST and SystemC nightly tests
There was a bug with the SST and SystemC tests where they wouldn't
compile due to a missing path for the gdbremote/signals.hh
header, and this change includes that so they run properly.

Change-Id: I9ff0404e327358fe2d1b77388bbcc1f807136ebe
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67817
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-30 21:01:42 +00:00
Marco Chen
f4d8fe2595 arch-arm: This commit fix incorrect ARM isa implementation
When running 500.perlbench_r of specint 2017, the system will raise an
 assertion error. For function bits of src/base/bitfield.hh (line 76),
 the parameter First is smaller than Last. This is caused by incorrect
 implementation of uqrshl in src/arch/arm/isa/insts/neon64.isa

When shiftAmt equals 0, which mean uqrshl is actually not shift the
 value stored in register. sizeof(Element) * 8 - 1 will be smaller than
 sizeof(Element) * 8 - shiftAmt, thus will raise the assertion error.

This commit added this special condition.

No Jira issue has been submitted to report this error

Change-Id: I4162ac3ddb62f162619db400f214f33209b23c19
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69318
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2023-03-29 15:22:01 +00:00
Bobby R. Bruce
91637af3dc tests: Add DRAMSys compilation and scripts to Weekly tests
Change-Id: I4353843e4e5f6db6f6d576dec4a34c3d403da1cc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69200
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2023-03-29 08:19:08 +00:00
803f9f5aa7 stdlib,configs: Add DRAMSys to the gem5 standard library
Add DRAMSys as a new AbstractMemorySystem to the gem5 stdlib.
Also, provide convenient subclasses with predefined DRAMSys
configurations.

Add two new stdlib examples:
    - dramsys-traffic.py: Demonstrates the usage of DRAMSys
      using the stdlib TrafficGenerators
    - arm-hello-dramsys.py: A variant of the arm-hello.py
      script that uses DRAMSys as it's memory.

These DRAMSys memory components are only compiled into the standard
library if DRAMSys is not compiled into gem5.

Change-Id: I9db87c41fbd9c28bc44e9d6bde13fc225dc16be9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62914
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2023-03-29 08:19:08 +00:00
ad8c4f1bf4 stdlib: Use get_mem_ports in incorporate caches
Make use of get_mem_ports() method of the AbstractMemorySystem
interface when incorporating caches to prevent the usage of the
hard-coded memory port name "port" as some memory controllers do
not have a port with this exact name.

Change-Id: Ic7480166b257c6d356027234758b65b0a97995e3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68482
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2023-03-29 08:19:08 +00:00
8d2831725a configs: Add DRAMSys config example
Add an example configuration for gem5 that runs the
DRAMSys simulator with a TrafficGenerator initiator.

Change-Id: If90f49fcc05b73905b2f9dc8b7aadfdbd866340a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62913
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-29 08:19:08 +00:00