Commit Graph

1123 Commits

Author SHA1 Message Date
Jason Lowe-Power
4aecf9d35c stdlib: fix typo in error message (#855)
Change-Id: I28f1881d207caa36c6101eef221ef4cdd229da57

Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
2024-02-06 09:50:01 -08:00
Mahyar Samani
b79fe82e5c cpu,stdlib: Updating strided generator (#762)
This change improves the functionality of strided generator to create
trace with better flexibility.
It allows the user to manually set offset and stride size instead of
calculating it based on a "gen_id".
This way different patterns could be created with the same SimObject.
In addition, this change adds stdlib components for strided generator.
2024-02-01 09:08:42 -08:00
Kaustav Goswami
b5d18b84a8 arm,stdlib: added kvm support to the ARM board (#725)
This change adds support to use KVM cores on the ARM board. The board
simulates gic to enable KVM, similar to the gem5 ARM FS configs. The
limitation is that it only supports VExpress_GEM5_V1.

Signed-off-by: Kaustav Goswami <kggoswami@ucdavis.edu>
2024-01-31 10:17:58 -08:00
Harshil Patel
c66862f6e3 arch-riscv: fix riscv matched board for se mode (#677) 2023-12-13 13:16:08 -08:00
Bobby R. Bruce
4eb81296b1 stdlib: Add get_local_path() call to Looppoint resources
Due to a change introduced in https://github.com/gem5/gem5/pull/625, a
gem5 resource will not download any external files until
`get_local_path()` is called. In the construction of the Looppoint
Resources this function was not called, the `local_path` variable was
called directly. As such, an error occured.

The downside of this fix is the Looppoint resources external files are
downloaded when `obtain_resource` is called, thus the bandwidth savings
introduced with https://github.com/gem5/gem5/pull/625 will not occur for
Looppoint resources. However, https://github.com/gem5/gem5/issues/644
proposes a fix which would supercede the
https://github.com/gem5/gem5/pull/625 solution.

Change-Id: I52181382a03e492ec1cb58b01e71bc4820af9ccc
2023-12-12 14:28:11 -08:00
Bobby R. Bruce
4adeb24a4f stdlib: Remove 'additional_params' value type assert
The value of a `WorkloadResource`'s additional parameter may not always
be a string. It can be any JSON value (integer, a list, a dict, ect.).
For Looppoint resources we have additional parameters such as a List of
region start points.

The assert inside workloads checking the type of the value breaks
certain usecase and is therefore removed in this commit.

Change-Id: Iecb1518082c28ab3872a8de888c76f0800261640
2023-12-12 14:23:04 -08:00
Bobby R. Bruce
ea1226119c arch-riscv: Update riscv matched board (#654)
- Update riscv matched board to work with new
RiscvBootloaderKernelWorkload

Change-Id: Ic20b964f33e73b76775bfe18798bd667f36253f6
2023-12-08 13:33:09 -08:00
Yu-Cheng Chang
10a0c950da stdlib: Fix the chi protocol of arm boot tests (#658)
Change-Id: I63f17a73b2e16bc26d9b41babc63439a6040791f
2023-12-07 16:10:45 -08:00
Harshil Patel
0f0317ad16 Arch-riscv: Add chosen node
Change-Id: I458665caec08856cd8e61d2cd7a5b0dc5c35d469
2023-12-06 20:10:56 -08:00
Harshil Patel
ee4c6a9bac arch-riscv: Update riscv matched boad
- Update riscv matched board to work with new
RiscvBootloaderKernelWorkload

Change-Id: Ic20b964f33e73b76775bfe18798bd667f36253f6
2023-12-05 14:54:12 -08:00
Hoa Nguyen
4a77d532b0 stdlib: Add Kernel Panic/Oops exit event to stdlib
RISCV full system workloads have the capability of exit the simulation loop
upon the guest's kernel panic/oops. This change adds more stdlib exit event types
to accommodate the corresponding gem5 exits upon the guest's kernel panic and
kernel oops.

Change-Id: I3a4f313711793a473c6f138ff831b948034d0bb6
Signed-off-by: Hoa Nguyen <hn@hnpl.org>
2023-12-04 16:52:14 -08:00
Bobby R. Bruce
569e21f798 configs,stdlib,tests: Remove get_runtime_isa() (#241)
`get_runtime_isa()` has been deprecated for some time. It is a leftover
piece of code from when gem5 was compiled to a single ISA and that ISA
used to configure the simulated system to use that ISA. Since multi-ISA
compilations are possible, `get_runtime_isa()` should not be used.
Unless the gem5 binary is compiled to a single ISA, a failure will
occur.

The new proceedure for specify which ISA to use is by the setting of the
correct `BaseCPU` implementation. E.g., `X86SimpleTimingCPU` of
`ArmO3CPU`.

This patch removes the remaining `get_runtime_isa()` instances and
removes the function itself. The `SimpleCore` class has been updated to
allow for it's CPU factory to return a class, needed by scripts in
"configs/common".

The deprecated functionality in the standard library, which allowed for
the specifying of an ISA when setting up a processor and/or core has
also been removed. Setting an ISA is now manditory.

Fixes #216.
2023-12-04 09:53:35 -08:00
Nitish Arya
7b98641953 arch-riscv: correctly pass arguments to kernel with new bootloader+kernel (#635)
The [PR](https://github.com/gem5/gem5/pull/390) adds support for new
bootloader and linux kernel. However after applying the changes the
arguments are not passed correctly to the kernel resulting in kernel
panic during simulations. This commit fixes the issue.
2023-12-04 09:02:50 -08:00
Bobby R. Bruce
c718e94753 stdlib: Add comment to ShadowResource (#645)
This comment explains that this solution is a hack the solution created
by https://github.com/gem5/gem5/issues/644 should eventually replace it.
2023-12-03 13:38:59 -08:00
Bobby R. Bruce
500a4221a0 stdlib: Mv resource download to get_local_path and add ShadowResource (#625)
This change decouple's the downloading of a resource from it's data.
With this change the `obtain_resource` function returns the
`AbstractResource` implementation which contains the data. The resource
itself (e.g., the actual disk image, binary, file, etc.) is only
downloaded to the host system, if not already present, upon the
`get_local_path` call.

`get_local_path` is the function used by gem5 to ultimately load the
resource into a simulation, therefore this change ensures we only
download resources when they are loaded into a simulation.

This change is not ideal and comes with the following caveats:

1. The `downloader` function is created in `obtain_workload` and passed
to the `AbstractResource` implementation for later use. This function
comes with the following requirements:
    * The function will download the resource to `local_path`.
    * The function will not re-download the resources if already present
as this function is called _everytime_ `get_local_path` is called.
2. The directories needed to store `local_path` are created in
`obtain_workload` regardless. Ergo even if the resource is not used and
`get_local_path` is never called these directories are still created.


In keeping with this efficiency `ShadowResource` is introduced to allow
the storing of just the resource ID and Version of a resource with
additional information only obtained when requested.
2023-12-01 17:04:21 -08:00
Bobby R. Bruce
48f3cd1c0e stdlib: Integrate BootloaderKernelWorkload (#630)
This change does the following,

- Change the name of several python parameter names of the
RiscvBootloaderKernelWorkload. This is done to conform the expectation
from the stdlib, e.g., the kernel path must be `object_file`, and the
boot parameter must be `command_line`.
- Use RiscvBootloaderKernelWorkload by default for all full system
RISC-V simulations. RiscvBootloaderKernelWorkload is a superset of
RiscvFsWorkload.
2023-12-01 17:04:02 -08:00
Bobby R. Bruce
88601d3ac5 stdlib: Add ShadowResource
The purpose of a `ShadowResource` is a resource which only contains the
ID and Version information, not any additional information about the
resource thus avoiding the `obtain_resource` call.

When attributes of the `ShadowResource` are accessed which can only be
obtained via `obtain_resource` the `ShowResource` calls the function and
returns what is required.

This is useful for `Suite` resources which contain several workloads
and resources which may not all be needed when the `Suite` object is
first instantiated.

Change-Id: Icc56261b2c4d74e4079ee66486ddae677bb35cfa
2023-12-01 13:38:08 -08:00
Ivana Mitrovic
d96b6cdae7 misc, stdlib: Update documentation to adhere to RST formatting. (#631)
This PR updates files in `src/python` to adhere to reStructuredText
formatting.
2023-12-01 11:43:49 -08:00
Hoa Nguyen
be3163a072 stdlib: Integrate BootloaderKernelWorkload
Change-Id: Ifeaa98059d5667c3335eaccd57a5295f44f88e43
Signed-off-by: Hoa Nguyen <hn@hnpl.org>
2023-12-01 07:28:30 +00:00
Bobby R. Bruce
743b2aada6 stdlib: Move resource download to get_local_path
This change decouple's the downloading of a resource from it's data.
With this change the `obtain_resource` function returns the
`AbstractResource` implementation which contains the data. The resource
itself (e.g., the actual disk image, binary, file, etc.) is only
downloaded to the host system, if not already present, upon the
`get_local_path` call.

`get_local_path` is the function used by gem5 to ultimately load the
resource into a simulation, therefore this change ensures we only
download resources when they are loaded into a simulation.

This change is not ideal and comes with the following caveats:

1. The `downloader` function is created in `obtain_workload` and passed
to the `AbstractResource` implementation for later use. This function
comes with the following requirements:
    * The function will download the resource to `local_path`.
    * The function will not re-download the resources if already present
as this function is called _everytime_ `get_local_path` is called.
2. The directories needed to store `local_path` are created in
`obtain_workload` regardless. Ergo even if the resource is not used and
`get_local_path` is never called these directories are still created.

Change-Id: I3f0e9a0099cba946630d719c3d17b7da0bccf74a
2023-11-30 15:27:44 -08:00
Andreas Sandberg
dcdebec0f6 misc,python: Add isort hook to pre-commit (#431) 2023-11-30 09:54:12 +00:00
Bobby R. Bruce
d11c40dcac misc: Run pre-commit run --all-files
This ensures `isort` is applied to all files in the repo.

Change-Id: Ib7ced1c924ef1639542bf0d1a01c5737f6ba43e9
2023-11-29 22:06:41 -08:00
Harshil Patel
392086b43d stdlib, resources: removed deprecated if statement in obtain_resource for workload resources (#611)
- The resources field in workload now changed to a dict of id and
version from a string with just the id.
There was an if statement added to support both versions in develop.
Removing the if statement so that 23.1 supports the new changes only.

Change-Id: Id8dc3f932f53a156e4fb609a215db7d85bd81a44
2023-11-29 14:27:23 -08:00
Roger Chang
d758df4b5c scons: Update the Kconfig build options
The CL updates the Kconfig:
1. Replace the USE_NULL_ISA with BUILD_ISA
2. The USE_XXX_ISAs are depends on BUILD_ISA
3. If the BUILD_ISA is set, at least one of USE_XXX_ISAs must be set
4. Refactor the USE_KVM option

Change-Id: I2a600dea9fb671263b0191c46c5790ebbe91a7b8
2023-11-23 08:26:11 +08:00
Bobby R. Bruce
bfe899e48e stdlib, resources: Update JSON data in workload (#532)
- resources field in workload now supports a dict with resources id and
version.

- Older workload JSON are still supported but added a deprecation waring
2023-11-16 10:11:13 -08:00
Derek Christ
e95cab429f configs,ext,stdlib: Update DRAMSys integration (#525)
Recent breaking changes in the DRAMSys API require user code to be
updated. These updates have been applied to the gem5 integration.

Furthermore, as DRAMSys started to use CMake dependency management,
it is no longer sensible to maintain two separate build systems for
DRAMSys. The use of the DRAMSys integration in gem5 will therefore
from now on require that CMake is installed on the target machine.

Additionally, support for snapshots have been implemented into DRAMSys
and coupled with gem5's checkpointing API.
2023-11-14 08:05:11 -08:00
Harshil Patel
50c9cbf613 stdlib, resources: Fixed deprecation warning
Change-Id: I61865d9a2c08e344824a735ee5e85fb54cd489da
2023-11-13 14:09:13 -08:00
Bobby R. Bruce
52354662aa arch-riscv: Fixing CMO instructions and allowing using CMO instructions in FS mode (#517)
arch-riscv: Fix implementation of CMO extension instructions

This change introduces a template for store instruction's mem access.
The new template is called CacheBlockBasedStore.

The reasons for not reusing the current Store's mem access template
are as follows,
- The CMO extension instructions operate on cache block size
granularity,
while regular load/store instructions operate on data of size 64 bits or
fewer.
- The writeMemAtomicLE/writeMemTimingLE interfaces do not allow passing
nullptr as data. However, CPUs in gem5 rely on (data == NULL) to detect
CACHE_BLOCK_ZERO instructions. Setting `Mem = 0;` to `uint64_t Mem;`
does not solve the problem as the reference is allocated and thus,
it's always true that `&Mem != NULL`. This change uses the
writeMemAtomic/writeMemTiming interfaces instead.
- Per CMO v1.0.1, the instructions in the spec do not generate
address misaligned faults.
- The CMO extension instructions do not use IMM.

---

arch-riscv: Fix generateDisassembly for Store with 1 source reg

Currently, store instructions are assumed to have two source registers.
However, since we are supporting the RISC-V CMO instructions, which
are Store instructions in gem5 but they only have one source register.
This change allows printing disassembly of Store instructions with
one source register.

---

arch-riscv: Make Zicbom/Zicboz extensions optional in FS mode

Currently, we're enable Zicbom/Zicboz by default. Since those
extensions might be buggy as they are not well-tested, making
those entensions optional allows running simulation where
the performance implication of the instructions do not matter.

Effectively, by turning off the extensions, we simply remove
those extensions from the device tree, so the OS would not
use them. It doesn't prohibit the userspace application to
use those instructions, however.

---

arch-riscv: Add all supporting Z extensions to RISC-V isa string
2023-11-13 03:38:49 -08:00
Zixian Cai
f97adbaac7 python: Handle unicode characters in config files (#521)
Previously, opening a config file (such as
`configs/example/hmc_hello.py`) containing non-ASCII characters causes
UnicodeDecodeError.
Also switch to use more an more idiomatic context manager for handling
files.

Change-Id: Ia39cbe2c420e9c94f3a84af459b7e5f4d9718d14
2023-11-07 08:59:42 -08:00
Harshil Patel
42fd7ff894 stdlib, resources: Update JSON data in workload
- resources field in workload now supports a dict with resources id
and version.

- Older workload JSON are still supported but added a deprecation waring

Change-Id: I137dbb99799a5294e84ce7d5d914f05e4cfe9e00
2023-11-03 13:54:30 -07:00
Hoa Nguyen
68287604ee arch-riscv: Make Zicbom/Zicboz extensions optional in FS mode
Currently, we're enable Zicbom/Zicboz by default. Since those
extensions might be buggy as they are not well-tested, making
those entensions optional allows running simulation where
the performance implication of the instructions do not matter.

Effectively, by turning off the extensions, we simply remove
those extensions from the device tree, so the OS would not
use them. It doesn't prohibit the userspace application to
use those instructions, however.

Change-Id: Ib30e98c4c39f741dec5f7d31bd7b832391686840
Signed-off-by: Hoa Nguyen <hn@hnpl.org>
2023-10-30 21:45:13 +00:00
Jason Lowe-Power
d0113185c6 arch-riscv: Dynamically add V extension to device tree (#464)
Currently, we are hardcoding the ISA string in the device tree
generator. The ISA string from the device tree affects which
ISA extensions will be used by the bootloader/kernel.

This function allows generating the ISA string from the gem5's
ISA object rather than using hardcoded values.

This series of changes also correct a couple of hardcoded
RISC-V ISA strings in the standard library, as well as not
enable RVV instructions for the U74 core model.

Signed-off-by: Hoa Nguyen <hn@hnpl.org>
2023-10-30 10:29:25 -07:00
Giacomo Travaglini
1087041698 stdlib: Use near atomics in the CHI component nodes
This is a temporary solution to fix daily tests. We could revert
to the default (policy_type = 1) once the problem is properly
fixed

Change-Id: Ia80af9a7d84d5c777ddeb441110a91a1680c1030
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2023-10-29 09:26:26 +00:00
Giacomo Travaglini
e496d29171 stdlib: Explicitly set alloc_on_atomic for the CHI example
gem5 will otherwise fatal with the error message:

fatal: ... alloc_on_atomic without default or user set value

See github issue [1] for further details

[1]: https://github.com/gem5/gem5/issues/449

Change-Id: I0bb8fccf0ac6d60fc6c1229436a35e91b2fb45cd
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2023-10-29 09:25:49 +00:00
Hoa Nguyen
50196863a4 stdlib,dev: Fix several hardcoded RISC-V ISA strings
The "s" and "u" letters are not recognized by the Linux kernel as
RISC-V extensions [1].

[1] https://elixir.bootlin.com/linux/v6.5.7/source/arch/riscv/kernel/cpufeature.c#L170

Change-Id: I2a99557482cde6e6d6160626b3995275c41b1577
Signed-off-by: Hoa Nguyen <hn@hnpl.org>
2023-10-25 20:12:57 +00:00
Hoa Nguyen
dce8d07703 stdlib: Turn off RVV for U74 core
The U74 core doesn't support vector instructions.

Change-Id: Iadfb6b43ef8c62dcad23391e468a43b908e4a22c
Signed-off-by: Hoa Nguyen <hn@hnpl.org>
2023-10-25 20:12:57 +00:00
Hoa Nguyen
4f72f6172a stdlib: Use the ISA string generator in the RiscvBoard
Current hardcoded value does not support vector instructions.
The new ISA string generator function allows the flexibility
of using or not using the vector extension.

Change-Id: Ic78c4b6629ad3813fc172f700d77ea956552e613
Signed-off-by: Hoa Nguyen <hn@hnpl.org>
2023-10-25 20:12:57 +00:00
Bobby R. Bruce
334df18dce arch-riscv: Add bootloader+kernel workload (#390)
Aims to boot OpenSBI + Linux kernel.
2023-10-18 09:17:12 -07:00
Andreas Sandberg
42d1c8b3c3 cpu: Restructure RAS (#428) 2023-10-17 19:14:13 +01:00
David Schall
5387e67114 cpu: Restructure RAS
The return address stack (RAS) is restructured to be a separate SimObject.
This enables disabling the RAS and better separation of the functionality.
Furthermore, easier statistics and debugging.

Change-Id: I8aacf7d4c8e308165d0e7e15bc5a5d0df77f8192
Signed-off-by: David Schall <david.schall@ed.ac.uk>
2023-10-17 15:30:56 +00:00
Bobby R. Bruce
a9464a41f5 stdlib,resources: Generalize exception for request retry (#466)
In commit bbc301f2f0 the generalized
`Exception` was changed back to the more specific `HTTPError`.

In this case we do not desire specific error handling. If the connection
to the database fails I want the exception handled in the way outlined:
i.e., i want the connection to be retried 4 times before giving up. With
`HTTPError`, only `HTTPError`s warrent a retry.

Changing this to `HTTPError` cause tests to fail due to a failure to
retry downloading of a resource. Here is an example:
https://github.com/gem5/gem5/actions/runs/6521543885/job/17710779784

In this case `request.urlopen` raised a `URLError`. I suspect this was
some issued to do with reaching the DNS servers. It likely would've
succeeded if it had just tried again.
2023-10-16 09:39:44 -07:00
Jason Lowe-Power
20f5555f30 python: Enable -m switch on gem5 binary (#453)
With -m, you can now run a module from the command line that is embedded
in the gem5 binary.
This will allow us to put some common "scripts" in the stdlib instead of
in the "configs" directory.
2023-10-14 20:08:06 -07:00
Bobby R. Bruce
c4156b06fb python: Fix base logic in MetaSimObject
This ensures `class Foo` is considered equivalent to `class
Foo(object)`.

Change-Id: I65a8aec27280a0806308bbc9d32281dfa6a8f84e
2023-10-10 21:47:08 -07:00
Bobby R. Bruce
298119e402 misc,python: Run pre-commit run --all-files
Applies the `pyupgrade` hook to all files in the repo.

Change-Id: I9879c634a65c5fcaa9567c63bc5977ff97d5d3bf
2023-10-10 21:47:07 -07:00
Bobby R. Bruce
3f5d7d647a misc: Run pre-commit autoupdate (#419)
1. Runs `pre-commit autoupdate`.
2. Runs `pre-commit run --all-files`.
3. Adds (2.) to ".git-blame-ignore-rev".
2023-10-10 21:41:33 -07:00
Bobby R. Bruce
d559c24ac2 stdlib: Improve handing of errors in Atlas request failures (#404)
Now:

* The Atlas Client will attempt a connection 4 times, using an
exponential backoff approach between attempts.
* When a failure does arise a rich output is given so problems can be
easily diagnosed.

Addresses: #340
2023-10-10 21:34:24 -07:00
Harshil Patel
bbc301f2f0 stdlib, tests: Fixed bugs and tests
- Fixed bugs rekated to retrying on request faliure.
- Updated the pyunit tests.

Change-Id: Ia484690267bf27018488324f3408f7e47c59bef3
2023-10-10 15:54:20 -07:00
Bobby R. Bruce
ddf6cb88e4 misc: Run pre-commit run --all-files
This is reflect the updates made to black when running `pre-commit
autoupdate`.

Change-Id: Ifb7fea117f354c7f02f26926a5afdf7d67bc5919
2023-10-10 14:01:58 -07:00
root
05ebbd2184 stdlib: Fix use internal _hashlib in md5_utils.py
Removes the use of the internal _hashlib, which is an
internal Python API

Change-Id: Id4541a143adb767ca7d942c0fd8a1cf1a08a04ab
2023-10-10 06:18:59 +00:00
Bobby R. Bruce
51c881d0f1 stdlib: Improve handing of errors in Atlas request failures
Now:

* The Atlas Client will attempt a connection 4 times, using an
  exponential backoff approach between attempts.
* When a failure does arise a rich output is given so problems can be
  easily diagnosed.

Change-Id: I3df332277c33a040c0ed734b9f3e28f38606af44
2023-10-09 16:30:02 -07:00