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a8a7ce2b886ca2571f9470a48a4f12302f9cc830
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337 Commits

Author SHA1 Message Date
Steve Reinhardt
a8a7ce2b88 Minor include file & formatting cleanup. 
--HG--
extra : convert_revision : fa23563b2897687752379d63ddab5cccb92484ba
 2006-08-30 09:57:46 -07:00
Steve Reinhardt
72eb4f5f12 Clean up BAR setting code. 
--HG--
extra : convert_revision : 8378be6cd6f55af7a199296cb2ff61ee94849bf7
 2006-08-28 11:17:49 -07:00
Steve Reinhardt
b77da23e1a Get rid of unneeded union. 
Verify that BAR sizes are powers of two.

--HG--
extra : convert_revision : ce8dca07aaf1a340cc166b99b5858613a954e2fd
 2006-08-28 11:01:25 -07:00
Steve Reinhardt
19d51452b1 Get rid of unused BARAddrs[] in PciConfigData object. 
--HG--
extra : convert_revision : a82e05326ca6150c70cb288b28f9f6eee89ad93d
 2006-08-28 10:34:15 -07:00
Steve Reinhardt
acfa88f732 Cleanup: formatting, comments, DPRINTFs. 
--HG--
extra : convert_revision : 565ab099f1c0744a13959e721c19dd03b7630f04
 2006-08-28 10:28:31 -07:00
Steve Reinhardt
55bde23071 Fix remote gdb buffer overflow. 
--HG--
extra : convert_revision : e5e5206bdd48120cebcb1e339b1dab2e10f4b6cf
 2006-08-28 09:58:03 -07:00
Steve Reinhardt
98e71d9ba6 Make address formats consistent in DPRINTFs. 
--HG--
extra : convert_revision : 73c6616aa9228c08e21fcc134dd0e675cd57aee6
 2006-08-28 09:55:13 -07:00
Steve Reinhardt
c5384366b6 Add dup() support (from Antti Miettinen). 
--HG--
extra : convert_revision : 72c834666afa3c353da026617ad5e7a762eb645f
 2006-08-28 07:39:56 -07:00
Ron Dreslinski
95e7b85c8b Still need LL/SC support in cache, add hack to always return success for now 
--HG--
extra : convert_revision : b354bd91be8c1bbb3aca7b4ba9e7e3e117ced164
 2006-08-22 16:09:34 -04:00
Ron Dreslinski
9f18764441 Commiting a version of the multi-phase snoop atomic bus so people can see the framework. Doesn't work, but also doesn't break uni-processor systems. 
Working on pulling out the changes in the cache so that it remains working.

src/mem/bus.cc:
    Changes for multi-phase snoop
    Some code for registering snoop ranges (a version that compiles and runs, but does nothing)
src/mem/bus.hh:
    Changes for multi-phase snoop
src/mem/packet.hh:
    Flag for multi-phase snoop
src/mem/port.hh:
    Status for multi-phase snoop

--HG--
extra : convert_revision : 4c2e5263bba16e3bcf03aabe36ff45ec36de4720
 2006-08-22 16:08:18 -04:00
Gabe Black
dda9819d93 Fix annulled unconditional branches 
--HG--
extra : convert_revision : 698b0ce38c7a47306f97df2cc80cdae4a51b22c7
 2006-08-21 22:41:57 -04:00
Gabe Black
ad867018d0 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ewok.(none):/home/gblack/m5/newmem

--HG--
extra : convert_revision : 15d8fd51f0c70da4d2e52c11864f3ab0f3f62811
 2006-08-21 15:09:18 -04:00
Gabe Black
0b0556a1da Got rid of the aux_data array since it shouldn't have existed. 
Added in the filename parameter which is provided for the user space linker.
Fix the ordering and alignment of stack elements.
Made mmap start with the address it has been seen starting with "in the wild"

--HG--
extra : convert_revision : 8734753145f59a6cb433e4f92f43cb28a44b56d4
 2006-08-21 14:29:50 -04:00
Gabe Black
623c697a3f Fixed the parameters to memset. sizeof(regSegments[x]) may have been returning the size of a pointer to an IntReg 
--HG--
extra : convert_revision : 02c04ffceb447b7683ba5ebd4752819d0014cc19
 2006-08-21 14:25:51 -04:00
Gabe Black
e54c5c99de Two bugs found by my tracing tool. 
1. alignaddr wrote it's address to a floating point register rather than a gpr.
2. sethi was sign extending it's immediate value.

--HG--
extra : convert_revision : 9aa30a6485bc4cba916367973b986d439b7c7588
 2006-08-21 14:23:39 -04:00
Ron Dreslinski
689eb39d48 Merge zizzer:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/newmem

src/python/m5/objects/BaseCPU.py:
    Merge duplicate change

--HG--
extra : convert_revision : 214e57999ee78aadfc86e1f0b7198ff0d981ce16
 2006-08-21 13:20:35 -04:00
Ron Dreslinski
825a7aadd2 Changes so that time in the packet is actually set properly. 
src/mem/packet.hh:
    Make sure packets set the time parameter correctly.

--HG--
extra : convert_revision : e381d2789e0aaa1b6c2fbde417b7ba5815deec61
 2006-08-21 13:16:46 -04:00
Steve Reinhardt
a12dbc3074 Update reference outputs 
--HG--
extra : convert_revision : 110a6c51cc1c562d115492b7360bfdbbded8eefd
 2006-08-18 00:17:21 -04:00
Steve Reinhardt
2b70b74c9b Changes to build m5.fast 
--HG--
extra : convert_revision : 2ec600b8e72e40e8b96e3b1dbe0334aa05e0f30b
 2006-08-17 23:13:11 -04:00
Ali Saidi
a3bf5f1953 add default range to PhysicalMemory 
--HG--
extra : convert_revision : 0a622ab0f0f7653d28d4ed3dd27113ae2bc82cae
 2006-08-17 18:46:43 -04:00
Ron Dreslinski
6eebfda2d9 Fix the caches not working in the regression 
src/python/m5/objects/BaseCPU.py:
    Make mem parameter a MemObject, not just a PhysicalMemory
    Fix a reference not using self
tests/configs/simple-atomic.py:
    Set the mem paramter
tests/configs/simple-timing.py:
    Set the mem parameter

--HG--
extra : convert_revision : 6bd9df36831a1c5bafc9e88ab945c2ebe91db785
 2006-08-16 23:46:54 -04:00
Ali Saidi
c7bb14ac79 DRAM Memory doesn't crash the simulator now.. still untested. 
--HG--
extra : convert_revision : fa2d2c5ec4073383f1b2b2f466d0245f2d6a6c35
 2006-08-16 23:39:31 -04:00
Ali Saidi
402fbda3df Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/tmp/m5.newmem

--HG--
extra : convert_revision : f4fa62290ca2bbd4726fb6c8e89655dade53bb68
 2006-08-16 19:01:23 -04:00
Ali Saidi
2f145ac54a Fix Physical Memory to allow memory sizes bigger than 128MB. 
Kinda port DRAM to new memory system. The code is *really* ugly (not my fault) and right now something about the stats it uses
causes a simulator segfault.

src/SConscript:
    Add dram.cc to sconscript
src/mem/physical.cc:
src/mem/physical.hh:
    Add params struct to physical memory, use params, make latency function be virtual
src/python/m5/objects/PhysicalMemory.py:
    Add DRAMMemory python class

--HG--
extra : convert_revision : 5bd9f2e071c62da89e8efa46fa016f342c01535d
 2006-08-16 19:01:11 -04:00
Steve Reinhardt
df3af8018e Minor regression fixes. 
src/python/m5/objects/BaseCPU.py:
    bug fix
tests/SConscript:
    fix up diff ignore strings to reflect changes
    in m5 output

--HG--
extra : convert_revision : b8e4acee34599ddd431b69fc9d40b6f6e440d128
 2006-08-16 14:16:52 -07:00
Ron Dreslinski
27d60c27fa Merge zizzer:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/newmem

--HG--
extra : convert_revision : 659f84c883b9992ae48f26c837983b9f8fcf18ab
 2006-08-16 15:59:26 -04:00
Ron Dreslinski
ec0a18ffb9 Fixes for Kevins O3 model to work with the blocking caches. 
src/cpu/o3/fetch_impl.hh:
    Fix ordering so dereference works
src/cpu/o3/lsq_impl.hh:
    Check to make sure we didn't squash already
src/cpu/o3/lsq_unit.hh:
    Fix for counting squashed retrys in the WB count
src/cpu/o3/lsq_unit_impl.hh:
    Make sure to set retryID for stores, and clear it appropriately

--HG--
extra : convert_revision : 689765a1baea7b36f13eb177d65e97b52b6da09f
 2006-08-16 15:56:22 -04:00
Ron Dreslinski
8a82553aec Fixes for blocking in the caches that needed to be pulled 
src/mem/cache/base_cache.cc:
    Add in retry path for blocking with multi-level caches
src/mem/cache/base_cache.hh:
    Pull more of the blocking fixes into head
src/mem/packet.hh:
    Fix typo

--HG--
extra : convert_revision : d4d149adfa414136ebd2c4789b739bb065710f7a
 2006-08-16 15:54:02 -04:00
Steve Reinhardt
bd4ccd6e39 Finish test clean-up & reorg. 
configs/common/FSConfig.py:
    Add default Machine() param
configs/example/fs.py:
configs/example/se.py:
    make it work again
src/python/m5/objects/BaseCPU.py:
    Make mem PhysicalMemory so that a Parent.any proxy works well
src/sim/process.cc:
    Increase default stack size so we don't get an
    'increasing stack' message on 'hello world'
tests/SConscript:
    Add full list of current configs.
tests/configs/simple-atomic.py:
tests/configs/simple-timing.py:
    don't need SEConfig anymore
tests/quick/00.hello/test.py:
tests/quick/20.eio-short/test.py:
    fix
tests/run.py:
    move configs to separate dir

--HG--
rename : configs/test/fs.py => configs/example/fs.py
rename : configs/test/test.py => configs/example/se.py
rename : tests/simple-atomic.py => tests/configs/simple-atomic.py
rename : tests/simple-timing.py => tests/configs/simple-timing.py
rename : tests/linux-mpboot/ref/alpha/atomic/config.ini => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini
rename : tests/linux-mpboot/ref/alpha/atomic/config.out => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out
rename : tests/linux-mpboot/ref/alpha/atomic/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/console.system.sim_console
rename : tests/linux-mpboot/ref/alpha/atomic/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt
rename : tests/linux-mpboot/ref/alpha/atomic/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr
rename : tests/linux-mpboot/ref/alpha/atomic/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout
rename : tests/linux-boot/ref/alpha/atomic/config.ini => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini
rename : tests/linux-boot/ref/alpha/atomic/config.out => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out
rename : tests/linux-boot/ref/alpha/atomic/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/console.system.sim_console
rename : tests/linux-boot/ref/alpha/atomic/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt
rename : tests/linux-boot/ref/alpha/atomic/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr
rename : tests/linux-boot/ref/alpha/atomic/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout
rename : tests/linux-mpboot/ref/alpha/timing/config.ini => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
rename : tests/linux-mpboot/ref/alpha/timing/config.out => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out
rename : tests/linux-mpboot/ref/alpha/timing/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/console.system.sim_console
rename : tests/linux-mpboot/ref/alpha/timing/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt
rename : tests/linux-mpboot/ref/alpha/timing/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr
rename : tests/linux-mpboot/ref/alpha/timing/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout
rename : tests/test-progs/hello/bin/mips/linux/hello_mips => tests/test-progs/hello/bin/mips/linux/hello
rename : tests/test-progs/hello/bin/sparc/bin => tests/test-progs/hello/bin/sparc/linux/hello
extra : convert_revision : d68ee6d7eefa7ba57370f3fb3c3589f86a6ea6b4
 2006-08-16 14:42:44 -04:00
Steve Reinhardt
2552e68eb6 More restructuring of regression tests. 
Moving work back to zizzer...

configs/common/FSConfig.py:
configs/test/fs.py:
    Move CPU connections out of makeLinuxAlphaSystem()
src/python/m5/objects/BaseCPU.py:
    Create default TLBs in full system.
    Move utility cache functions here.
src/python/m5/objects/O3CPU.py:
    Add _mem_ports
tests/run.py:
    Add binpath()
    Change maxtick default to 'forever'
tests/simple-atomic.py:
    Use connectmemPorts()
tests/simple-timing.py:
    Fix up.

--HG--
rename : tests/quick/eio1/ref/alpha/eio/detailed/config.ini => tests/quick/20.eio-short/ref/alpha/eio/detailed/config.ini
rename : tests/quick/eio1/ref/alpha/eio/detailed/config.out => tests/quick/20.eio-short/ref/alpha/eio/detailed/config.out
rename : tests/quick/eio1/ref/alpha/eio/detailed/m5stats.txt => tests/quick/20.eio-short/ref/alpha/eio/detailed/m5stats.txt
rename : tests/quick/eio1/ref/alpha/eio/detailed/stderr => tests/quick/20.eio-short/ref/alpha/eio/detailed/stderr
rename : tests/quick/eio1/ref/alpha/eio/detailed/stdout => tests/quick/20.eio-short/ref/alpha/eio/detailed/stdout
rename : tests/quick/eio1/ref/alpha/eio/simple-atomic/config.ini => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini
rename : tests/quick/eio1/ref/alpha/eio/simple-atomic/config.out => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.out
rename : tests/quick/eio1/ref/alpha/eio/simple-atomic/m5stats.txt => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/m5stats.txt
rename : tests/quick/eio1/ref/alpha/eio/simple-atomic/stderr => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stderr
rename : tests/quick/eio1/ref/alpha/eio/simple-atomic/stdout => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout
rename : tests/quick/eio1/ref/alpha/eio/simple-timing/config.ini => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
rename : tests/quick/eio1/ref/alpha/eio/simple-timing/config.out => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.out
rename : tests/quick/eio1/ref/alpha/eio/simple-timing/m5stats.txt => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt
rename : tests/quick/eio1/ref/alpha/eio/simple-timing/stderr => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stderr
rename : tests/quick/eio1/ref/alpha/eio/simple-timing/stdout => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout
rename : tests/quick/eio1/test.py => tests/quick/20.eio-short/test.py
rename : configs/test/hello => tests/test-progs/hello/bin/alpha/linux/hello
rename : configs/test/hello_mips => tests/test-progs/hello/bin/mips/linux/hello_mips
rename : configs/test/sparc_tests/hello_sparc => tests/test-progs/hello/bin/sparc/bin
extra : convert_revision : 1f891392ecc11ffcc3b3182fa673c401c0efc8a5
 2006-08-16 09:52:05 -07:00
Gabe Black
da6649fa71 Tweaks to Ali's changes 
--HG--
extra : convert_revision : ca2a81dd38012ae780f88cfd6be60f21fb43bb81
 2006-08-15 19:17:18 -04:00
Ali Saidi
4c3e01bd90 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/tmp/m5.newmem

--HG--
extra : convert_revision : d490a68eeabd0da7cd9791e14ca3678ed0fd31e6
 2006-08-15 17:41:37 -04:00
Ali Saidi
ed58f77c47 fixes for gcc 4.1 
Nate needs to fix sinic builder stuff
Gabe needs to verify my fixes to decoder.isa

OPT/DEBUG compiles for ALPHA_FS, ALPHA_SE, MIPS_SE, SPARC_SE with this changeset

README:
    Fix the swig version in the readme
src/SConscript:
    remove sinic until nate fixes the builder crap for it
src/arch/alpha/system.hh:
src/arch/mips/isa/includes.isa:
src/arch/sparc/isa/decoder.isa:
src/base/stats/visit.cc:
src/base/timebuf.hh:
src/dev/ide_disk.cc:
src/dev/sinic.cc:
src/mem/cache/miss/mshr.cc:
src/mem/cache/miss/mshr_queue.cc:
src/mem/packet.hh:
src/mem/request.hh:
src/sim/builder.hh:
src/sim/system.hh:
    fixes for gcc 4.1

--HG--
extra : convert_revision : 3775427c0047b282574d4831dd602c96cac3ba17
 2006-08-15 17:41:22 -04:00
Ron Dreslinski
d5ac1cb51f Pulled out changes to fix EIO programs with caches. Also fixes any translatingPort read/write Blob function problems with caches. 
-Basically removed the ASID from places it is no longer needed due to PageTable

src/mem/cache/cache.hh:
src/mem/cache/cache_impl.hh:
src/mem/cache/miss/blocking_buffer.cc:
src/mem/cache/miss/blocking_buffer.hh:
src/mem/cache/miss/miss_queue.cc:
src/mem/cache/miss/miss_queue.hh:
src/mem/cache/miss/mshr.cc:
src/mem/cache/miss/mshr.hh:
src/mem/cache/miss/mshr_queue.cc:
src/mem/cache/miss/mshr_queue.hh:
src/mem/cache/prefetch/base_prefetcher.cc:
src/mem/cache/prefetch/base_prefetcher.hh:
src/mem/cache/tags/fa_lru.cc:
src/mem/cache/tags/fa_lru.hh:
src/mem/cache/tags/iic.cc:
src/mem/cache/tags/iic.hh:
src/mem/cache/tags/lru.cc:
src/mem/cache/tags/lru.hh:
src/mem/cache/tags/split.cc:
src/mem/cache/tags/split.hh:
src/mem/cache/tags/split_lifo.cc:
src/mem/cache/tags/split_lifo.hh:
src/mem/cache/tags/split_lru.cc:
src/mem/cache/tags/split_lru.hh:
    Remove asid where it wasn't neccesary anymore due to Page Table

--HG--
extra : convert_revision : ab8bbf4cc47b9eaefa9cdfa790881a21d0e7bf28
 2006-08-15 16:21:46 -04:00
Ron Dreslinski
d0d0d7b636 Merge zizzer:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/newmem

--HG--
extra : convert_revision : 8a8d7fe59610806015c8242a2f5eacf9afce7164
 2006-08-15 14:28:22 -04:00
Ron Dreslinski
dc375e42bc Some changes to support blocking in the caches 
src/mem/cache/base_cache.cc:
src/mem/cache/base_cache.hh:
src/mem/cache/cache_impl.hh:
    Outstanding blocking updates for cache

--HG--
extra : convert_revision : 3a7b4aa4921de8239f604f1852f262a2305862c0
 2006-08-15 14:24:49 -04:00
Gabe Black
74e80fc6c7 Some touchup to the reorganized includes and "using" directives. 
--HG--
extra : convert_revision : 956c80d6d826b08e52c0892a480a0a9b74b96b9d
 2006-08-15 05:49:52 -04:00
Gabe Black
cd6eb53965 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ewok.(none):/home/gblack/m5/newmem

src/cpu/static_inst.hh:
    SCCS merged

--HG--
extra : convert_revision : a4f6377dbd691ab58fe5f7958b983b092575f250
 2006-08-15 05:08:30 -04:00
Gabe Black
74546aac01 Cleaned up include files and got rid of many using directives in header files. 
--HG--
extra : convert_revision : 6b11e039cbc061dab75195fa1aebe6ca2cdc6f91
 2006-08-15 05:07:15 -04:00
Gabe Black
c9900f159e Fixed ALPHA_FS by moving the remnants of isa_fullsys_traits.hh into arch/alpha/pagetable.hh and fixing up some includes 
--HG--
extra : convert_revision : 02a47fa62b17245763314890beb68339c789d18f
 2006-08-15 04:46:51 -04:00
Steve Reinhardt
5bd07f98ed Fix up doxygen. 
--HG--
rename : docs/footer.html => src/doxygen/footer.html
rename : docs/stl.hh => src/doxygen/stl.hh
extra : convert_revision : 2b2e5637930843c1be07deaa708fd4126213cda2
 2006-08-14 19:25:07 -04:00
Gabe Black
741bc40cc3 Changed the size parameter from int to int64_t 
--HG--
extra : convert_revision : a19404bdc3a6434fe28f8aa278dc6addf764be22
 2006-08-14 03:18:38 -04:00
Gabe Black
fc8b4f5253 Started to add support for O3 for sparc. 
--HG--
extra : convert_revision : 3f94bda14024a09b9fbd7a5d13284d4987349ddf
 2006-08-11 20:29:15 -04:00
Gabe Black
95dc8e4d57 Changed the compiler guards to say SPARC 
--HG--
extra : convert_revision : e79964148c7fb7075627f46add6687f6cd0ee241
 2006-08-11 20:28:35 -04:00
Gabe Black
fb35d474a5 Added code to support setting up all of the auxillieary vectors configured by the sparc linux elf loader. 
src/arch/sparc/process.cc:
    All of the auxilliary vectors are now set like they are in the linux elf loader. This code should probably be moved to arch/sparc/linux/process.cc somehow.

--HG--
extra : convert_revision : 4a90cacf70b1032cad3f18b0f833a6df8237e0de
 2006-08-11 20:27:22 -04:00
Gabe Black
1f44717732 #include of iostream needed. 
--HG--
extra : convert_revision : d31bb943ab25103cf715159054df318a5b88abc9
 2006-08-11 20:23:31 -04:00
Gabe Black
e6842652ba Adjusted the decoder a little. 
--HG--
extra : convert_revision : 5bdbe00342837ae4caacb3ad86c7becca36ba6ce
 2006-08-11 20:22:36 -04:00
Gabe Black
ec26f0bb3d Started adding a system to output data after every instruction. 
src/arch/alpha/regfile.hh:
src/arch/mips/regfile/float_regfile.hh:
src/arch/mips/regfile/int_regfile.hh:
src/arch/mips/regfile/misc_regfile.hh:
src/cpu/exetrace.hh:
    Added functions to start to support dumping register values once per cycle.
src/cpu/exetrace.cc:
    Added some code to support printing the value of registers after each cycle.
src/python/m5/main.py:
    Options to turn on output after every instruction. They are commented out.

--HG--
extra : convert_revision : 168a48a6b98ab6be412a96bdee831c71906958b0
 2006-08-11 20:21:35 -04:00
Gabe Black
800e6ecc07 Pushed most of constants.hh back into isa_traits.hh and regfile.hh and created a seperate file for the syscallreturn class. 
--HG--
extra : convert_revision : 9507ea1c09fda959f00aec9ec8ffb887ec8dd0f9
 2006-08-11 19:43:10 -04:00
Kevin Lim
08c0919b43 Clean up some more config stuff. 
configs/common/FSConfig.py:
    Clean up some code to make functions look less like classes.  Also put makeList function (formerly listWrapper) into m5 itself.
configs/test/fs.py:
    Update for changed code.
src/python/m5/__init__.py:
    Put makeList into m5.

--HG--
extra : convert_revision : 731806a7486f9abf986f52926126df666b024b1d
 2006-07-27 17:49:00 -04:00