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Two bugs found by my tracing tool.

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1. alignaddr wrote it's address to a floating point register rather than a gpr.
2. sethi was sign extending it's immediate value.

--HG--
extra : convert_revision : 9aa30a6485bc4cba916367973b986d439b7c7588
This commit is contained in:
Gabe Black
2006-08-21 14:23:39 -04:00
parent a12dbc3074
commit e54c5c99de
2 changed files with 5 additions and 5 deletions
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8
src/arch/sparc/isa/decoder.isa
View File

@@ -106,7 +106,7 @@ decode OP default Unknown::unknown()
}
}
//SETHI (or NOP if rd == 0 and imm == 0)
0x4: SetHi::sethi({{Rd = imm;}});
0x4: SetHi::sethi({{Rd.udw = imm;}});
0x5: Trap::fbpfcc({{fault = new FpDisabled;}});
0x6: Trap::fbfcc({{fault = new FpDisabled;}});
}
@@ -535,15 +535,15 @@ decode OP default Unknown::unknown()
0x10: Trap::array8({{fault = new IllegalInstruction;}});
0x12: Trap::array16({{fault = new IllegalInstruction;}});
0x14: Trap::array32({{fault = new IllegalInstruction;}});
0x18: BasicOperate::alignaddress({{
0x18: BasicOperate::alignaddr({{
uint64_t sum = Rs1 + Rs2;
Frd = sum & ~7;
Rd = sum & ~7;
Gsr = (Gsr & ~7) | (sum & 7);
}});
0x19: Trap::bmask({{fault = new IllegalInstruction;}});
0x1A: BasicOperate::alignaddresslittle({{
uint64_t sum = Rs1 + Rs2;
Frd = sum & ~7;
Rd = sum & ~7;
Gsr = (Gsr & ~7) | ((~sum + 1) & 7);
}});
0x20: Trap::fcmple16({{fault = new IllegalInstruction;}});

2
src/arch/sparc/isa/formats/integerop.isa
View File

@@ -67,7 +67,7 @@ output header {{
{
}
int32_t imm;
int64_t imm;
std::string generateDisassembly(Addr pc,
const SymbolTable *symtab) const;