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Adjusted the decoder a little.

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--HG--
extra : convert_revision : 5bdbe00342837ae4caacb3ad86c7becca36ba6ce
This commit is contained in:
Gabe Black
2006-08-11 20:22:36 -04:00
parent ec26f0bb3d
commit e6842652ba
1 changed files with 7 additions and 7 deletions
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14
src/arch/sparc/isa/decoder.isa
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@@ -117,15 +117,15 @@ decode OP default Unknown::unknown()
0x2: decode OP3 {
format IntOp {
0x00: add({{Rd = Rs1.sdw + Rs2_or_imm13;}});
0x01: and({{Rd = Rs1.udw & Rs2_or_imm13;}});
0x02: or({{Rd = Rs1.udw | Rs2_or_imm13;}});
0x03: xor({{Rd = Rs1.udw ^ Rs2_or_imm13;}});
0x01: and({{Rd = Rs1.sdw & Rs2_or_imm13;}});
0x02: or({{Rd = Rs1.sdw | Rs2_or_imm13;}});
0x03: xor({{Rd = Rs1.sdw ^ Rs2_or_imm13;}});
0x04: sub({{Rd = Rs1.sdw - Rs2_or_imm13;}});
0x05: andn({{Rd = Rs1.udw & ~Rs2_or_imm13;}});
0x06: orn({{Rd = Rs1.udw | ~Rs2_or_imm13;}});
0x07: xnor({{Rd = ~(Rs1.udw ^ Rs2_or_imm13);}});
0x05: andn({{Rd = Rs1.sdw & ~Rs2_or_imm13;}});
0x06: orn({{Rd = Rs1.sdw | ~Rs2_or_imm13;}});
0x07: xnor({{Rd = ~(Rs1.sdw ^ Rs2_or_imm13);}});
0x08: addc({{Rd = Rs1.sdw + Rs2_or_imm13 + Ccr<0:0>;}});
0x09: mulx({{Rd = Rs1 * Rs2_or_imm13;}});
0x09: mulx({{Rd = Rs1.sdw * Rs2_or_imm13;}});
0x0A: umul({{
Rd = Rs1.udw<31:0> * Rs2_or_imm13<31:0>;
Y = Rd<63:32>;