This change:
1. Removes the 'Specifying a subset of tests to run' section. This
section is no longer useful since tests are no longer divided up so
neatly by tags as they once were.
2. Adds a section outlining the 'quick', 'long' and 'very-long' tests
and how they may be selected and run.
Change-Id: I61370dd80cc925a15d1a22755faa7d62e810862f
This is a simple copy of the current state of the .github on the develop
branch, as of 2023-07-27. The stable branch .github dir should never be
ahead of that on develop. Therefore this should be safe to do.
Change-Id: I1e39de2d1f923d1834d0a77f79a1ff3220964bba
In https://gem5-review.googlesource.com/c/public/gem5/+/52047 inst.pc
was changed from an object to a pointer. It is possible that this
pointer is null (e.g., if there is an interrupt and there is a bubble).
Make sure to check that it's not null before printing.
I believe that other places this pointer is dereferenced without an
explicit null check are safe, but I'm not certain.
Change-Id: Idbe246cfdb62d4d75416d41b451fb3c076233bbc
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
* cpu-kvm: Add a variable signifying whether we are using perf
Change-Id: Iaa081e364f85c863f781723b5524d267724ed0e4
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
* cpu-kvm: Making it clear the functionalities are specific to KVM
Change-Id: I982426f294d90655227dc15337bf73c42a260ded
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
* cpu-kvm: Make perf optional
Change-Id: I8973c2a96575383976cea7ca3fda478f83e95c3f
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
* configs: Add an example config of using KVM without perf
Change-Id: Ic69fa7dac4f1a2c8fe23712b0fa77b5b22c5f2df
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
* Apply suggestions from code review
Co-authored-by: Jason Lowe-Power <jason@lowepower.com>
* misc: Add an example to the panic
Change-Id: Ic1fdfb955e5d8b9ad1d4f0a2bf30fa8050deba70
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
* misc: Add warning of not using perf when using KVM CPU
Change-Id: I96c0832fb48c63a79773665ca6228da778ef0497
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
* misc: Fix stuff
Change-Id: Ib407ae7407955b695f0e0f2718324f41bb0d768f
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
* misc: style fix
Change-Id: I7275942e43f46140fdd52c975f76abb3c81b8b0a
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
---------
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Co-authored-by: Jason Lowe-Power <jason@lowepower.com>
In the previous version of gem5, the source files of extra directories
will copy to build directory for compilation. It will not be a problem
if the extra directories include *.h(*.hh) from the other extra
directories.
After the patch applied from the change
(https://gem5-review.googlesource.com/c/public/gem5/+/68758). The
source files of extra directories will not copy to the build directory
unless the user compiles gem5 with "--duplicate-sources". It will
cause the compilation error if the code includes a header file from
other repositories.
For example, assume we want to compile gem5 with "foo/bar1" and
"foo/bar2" repositories and they are gem5-independent. There are some
header files in "foo/bar1/a.h" "foo/bar1/b.h" and "foo/bar2/d.h". If
the code "foo/bar1/sample.c" tries to include the file "foo/bar2/d.h".
They usually include the file by declare "#include bar2/d.h" in
foo/bar1/sample.c. It can work if --duplicate-sources is specified in
gem5 build because they will copy to <builddir>/bar1 and
<builddir>/bar2 respectively, and -I<builddir> is specified by default
whether duplicate_sources or not. It will raise the compilation error
if the user does not specify it.
The change is aimed to let the situation work without
duplicate-sources specified by adding parent extra directory, and
adding them before the extra directories. If the --duplicate-sources
specified, it will not add parent extra directories to avoid repeat
include paths.
Change-Id: I461e1dcb8266d785f1f38eeff77f9d515d47c03d
FEAT_TLBIOS has been introduced by a recent patch [1] which
was however missing to include the outer shareable case in the
Msr disambiguation switch. Which meant the TLBIOS instructions
were decoded as normal MSR instructions, with no effect whatsoever
on the TLBs
[1]: https://gem5-review.googlesource.com/c/public/gem5/+/70567
Change-Id: I41665a4634fbe0ee8cc30dbc5d88d63103082ae9
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
* misc: Update README to README.md
This change converts the text-based README to markdown. This works
better with modern source-control systems, most notably, GitHub.
The README.md has been broken down into sections to better organize the
document.
This section now included expanded information on Reporting bugs and
Requesting Features.
Due to renaming 'README' to 'README.md', this code was generating the
following for "info.py":
```
README.md = "<FILE CONTENTS HERE>"
```
As '.' is used to access member variables/methods in python. To fix this
"infopy.oy" now replaces "." with "_". As such the generated in in
"info.py" is now:
```
README_MD = "<FILE CONTENTS HERE>"
This puts GitHub Discussions and GitHub Issues towards the top of the
list. This is to incentivize their usage.
Change-Id: I18018ba23493f43861544497f23ec59f1e8debe1
---------
Co-authored-by: Jason Lowe-Power <jason@lowepower.com>
* tests: Remove large files from resource specialization tests
These tests were downloading resources (but not actually using them) to
ensure the `obtain_resources` function returned the correct
specialization and was parsing the data correctly. As these resources
were never used, this patch removes the downloading of large files in
this case, replacing them with smaller binaries.
Change-Id: I7b33aa6be8ec65b296b470cd50b128c084f2b71f
* tests: Rename 'looppoint-json...' example specailization
Appending '-example' to the end avoids any name clashes.
'looppoint-json-restore-resources-region-1' shares this ID with a real
resources in gem5 Resources.
Change-Id: I9853e97cb71e768c46ad173b5a497609f4acc3b2
* tests: Remove disk image download from Workload Checks
This download is big and unecessary (the workload is never run as part
of the test). This patch changes this test to instead download a small
binary in it's palce (again, this does not matter as this is never
actually run as a disk image).
Change-Id: I74034ebcf5f2501917847c258570e88a8f653a5d
* tests: Update IDs in Pyunit Workload checks
Some of these IDs clash with real workloads/resources in gem5 Resources.
To avoid any possible clashes or confusions, all the mock
resources/workloads in this suite of tests has been renamed with
'-example' appending on the end of the ID.
Change-Id: Ifd907b2321416bf05e8c4e646024d179da2ca487
When shiftAmt is 0 for a UQRSHL instruction, the code called bits() with
incorrect arguments. This fixes a left-shift of 0 to be a NOP/mov, as
required.
Change-Id: Ic86ca40ac42bfb767a09e8c65a53cec56382a008
Co-authored-by: Marton Erdos <marton.erdos@arm.com>
TracingExtension contains a stack recording the port names
passed through of the Packet. The target receiving the Packet
can dump out the whole path of this Packet for the debug purpose.
This mechanism can be enabled with the debug flag PortTrace.
Change-Id: Ic11e708b35fdddc4f4b786d91b35fd4def08948c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/71538
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
The cache is modeled after an AMD EPYC cache, but not exactly
like AMD EPYC cache.
- K cores per core complex (CCD), each core has one private split L1,
and one private L2.
- K cores in the same CCD share 1 slice of L3 cache, which is not
a victim cache.
- There can be multiple CCDs, which communicate with each other via
Cross-CCD router. The Cross-CCD rounter is also connected to
directory controllers and dma controllers.
- All links latency are set to 1.
Change-Id: Ib64248bed9155b8e48e5158ffdeebf1f2d770754
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/71598
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
We have some customized protocols in gem5 repository and they require
the include path from src directory. It causes the users of those
protocols need to handle the include path correctly by theirselve. This
is tedious and unstable. We should add the default include path in
SIMGEN command line to prevent issues.
Change-Id: I2a3748646567635d131a8fb4099e02e332691e97
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/71118
Reviewed-by: Wei-Han Chen <weihanchen@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Due to some cherry-picking onto the release-staging branch, there was a
missing "sim/sim_exit.hh" include in "src/gpu-compute/dispatcher.cc".
This was causing compilation errors.
This is being added to the v23.0.0 release as a hotfix.
Change-Id: I1043ecf5c41ad6afc0e91311b196f4801646002f
Issue-on: https://gem5.atlassian.net/browse/GEM5-1332
This was deprecated in C++14 and removed in C++17. This has been
replaced with std::random. This has been implemented to ensure
reproducible results despite (pseudo)random behavior.
Change-Id: Idd52bc997547c7f8c1be88f6130adff8a37b4116
The PCI read/write functions are atomic functions in gem5, meaning they
expect a response with a latency value on the same simulation Tick. For
reads to a PCI device, the response must also include a data value read
from the device.
The AMDGPU device has a PCI BAR which mirrors the frame buffer memory.
Currently reads are done atomically, but writes are sent to a DMA device
without waiting for a write completion ACK. As a result, it is possible
that writes can be queued in the DMA device long enough that another
read for a queued address arrives. This happens very deterministically
with the AtomicSimpleCPU and causes GPUFS to break with that CPU.
This change makes writes to the frame BAR atomic the same as reads. This
avoids that problem and as a result the AtomicSimpleCPU can now load the
driver for GPUFS simulations.
Change-Id: I9a8e8b172712c78b667ebcec81a0c5d0060234db
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/71898
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matthew Poremba <matthew.poremba@amd.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
(cherry picked from commit 079fc47dc2)
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/72079
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
