Commit Graph

18 Commits

Author SHA1 Message Date
Andreas Sandberg
40c581be44 configs: Remove Python 2.7 glue code
Remove uses of six and from __future__ imports as they are no longer
needed.

Change-Id: I6e2f270557d7343bbad30c8e6d743e363c43715a
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39755
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-01-26 17:34:08 +00:00
Tiago Mück
ca29eef37e configs,tests: use Sequencer port connect methods
This patch updates Ruby configuration scripts to use the functions
defined in the RubySequencer python object to connect to cpu ports.

Only the protocol-agnostic scripts were updated. Scripts that assume
a specific protocol (e.g. configs/example/apu_se.py, gpu tests, etc)
and scripts in which the obj connected to the RubySequencer is not a
BaseCPU (e.g. the tests scripts) were not changed as they require a
non-standard port wireup.

Change-Id: I1e931ff0fc93f393cb36fbb8769ea4b48e1a1e86
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31418
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-12-07 19:52:22 +00:00
Giacomo Travaglini
330a5f7bad misc: BaseCPU using ArchMMU instead of ArchDTB/ArchITB
With this commit we replace every TLB pointer stored in the
cpu model with a BaseMMU pointer.

JIRA: https://gem5.atlassian.net/browse/GEM5-790

Change-Id: I4932a32f68582b25cd252b5420b54d6a40ee15b8
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34976
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-10-21 09:33:39 +00:00
Gabe Black
b489e49c68 configs,tests: Update configs to use compatible SE workloads.
If there's no more compatible workload than the base SEWorkload class it
will fall back to that for now.

Change-Id: Id27172c3074a7976823a891878ab9eecf6246c47
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33901
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-10-13 04:59:04 +00:00
Tiago Mück
ab309b9e4e mem-ruby: Sequencer can be used without cache
Moved the dcache check to the LLSC functions that use it.
This allows a Sequencer to be coupled with a gem5 object
that does not need a cache (as long as it doesn't issue
LLSC instructions).

Also, icache was not used at all so it was removed.

Change-Id: I04bd2711f8d0a7dfc952cff8e0020d2d1881cae1
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31267
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Bradford Beckmann <bradford.beckmann@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-10-12 14:09:55 +00:00
Gabe Black
3293926413 sim: Create a Workload object for SE mode.
The workload object is still optional for the sake of compatibility,
even though it probably shouldn't be in the long term. If a simulation
is just a collection of components with nothing in particular running on
it, for instance driven by a traffic generator, should it even have a
System object in the first place?

Change-Id: I8bcda72bdfa3730248226fb62f0bba9a83243d95
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33278
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-20 07:26:22 +00:00
Wendy Elsasser
7a28c82c6e mem: Clean up Memory Controller
Make the actual controller more generic
    - Rename DRAMCtrl to MemCtrl
    - Rename DRAMacket to MemPacket
    - Rename dram_ctrl.cc to mem_ctrl.cc
    - Rename dram_ctrl.hh to mem_ctrl.hh
    - Create MemCtrl debug flag

Move the memory interface classes/functions to separate files
    - mem_interface.cc
    - mem_interface.hh

Change-Id: I1acba44c855776343e205e7733a7d8bbba92a82c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31654
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-08 16:38:47 +00:00
Wendy Elsasser
4acc419b6f mem: Make MemCtrl a ClockedObject
Made DRAMCtrl a ClockedObject, with DRAMInterface
defined as an AbstractMemory. The address
ranges are now defined per interface. Currently
the model only includes a DRAMInterface but this
can be expanded for other media types.

The controller object includes a parameter to the
interface, which is setup when gem5 is configured.

Change-Id: I6a368b845d574a713c7196c5671188ca8c1dc5e8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28968
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-08 16:38:47 +00:00
Matt Poremba
53b6e21c63 mem-ruby: Replace SLICC queueMemory calls with enqueue
Calls to queueMemoryRead and queueMemoryWrite do not consider the size
of the queue between ruby directories and DRAMCtrl which causes infinite
buffering in the queued port between the two. This adds a MessageBuffer
in between which uses enqueues in SLICC and is therefore size checked
before any SLICC transaction pushing to the buffer can occur, removing
the infinite buffering between the two.

Change-Id: Iedb9070844e4f6c8532a9c914d126105ec98d0bc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27427
Tested-by: Gem5 Cloud Project GCB service account <345032938727@cloudbuild.gserviceaccount.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bradford Beckmann <brad.beckmann@amd.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Bradford Beckmann <brad.beckmann@amd.com>
2020-04-08 23:40:57 +00:00
Gabe Black
e9fcfb3c16 config: Delete authors lists from config files.
Change-Id: I049f2e97ad00d76341c2aeeaa02279862a8a4d71
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25416
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2020-02-17 10:06:07 +00:00
Bobby R. Bruce
994c72948e misc: Updated old gem5 website URLs with new gem5 website URLs
Jira: https://gem5.atlassian.net/browse/GEM5-272
Change-Id: Ieadb6dd7a44dde4b0be647c91896551822b06a57
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24503
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-29 16:17:32 +00:00
Jason Lowe-Power
e2656006df configs: Generalize FileSystemConfig for non se.py
This patch updates the FileSystemConfig so it works with more kinds of
config scripts (e.g., the Learning gem5 scripts).

There are 4 main changes:
- Added system as a parameter to the config_filesystem function so the
function can search the system for the number of CPUs instead of relying
on options from Options.py
- Instead of calling redirect_paths everywhere config_filesystem is
used, now it is implicitly called.
- Cleaned up the Ruby scripts a bit to remove redundant calls to
config_filesystem
- Added a config_filesystem call to the Ruby Learning gem5 script
(currently the only Learning gem5 script that requires it).

In the future, I think it would be better to move the config_filesystem
call into simulate.py, probably into the instantiate function. I tried to
use the per-CPU configuration parameters instead of options from
Options.py, but that's not possible until after the SimObject params
have been finalized in instantiate.

Change-Id: Ie6501a7435cfb3ac9d2b45be3722388b34063b1e
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18848
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2019-05-17 17:16:07 +00:00
Jason Lowe-Power
7f9c98472c learning_gem5,configs: Update ruby_test
Use SimpleMemory instead of DDR3 so we can use the timing results in
tests. By using SimpleMemory, even if the DRAM timing changes the timing
of this test won't change. I expect the timing of SimpleMemory to never
change.

Change-Id: I4c75981d7b8bfc4dcca59e628e89f5a6ea4c0e36
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17871
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
2019-04-08 22:51:38 +00:00
Jason Lowe-Power
36bce3927e configs: Fix import path error in learning_gem5 part3
Change-Id: I2c5cd22bded998bae8e7aa77e42e1b042ce1c5f5
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17869
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
2019-04-08 22:51:38 +00:00
Andreas Sandberg
fe3e808495 configs: Use absolute import paths
Use absoluate import paths to be Python 3 compatible. This also
imports absolute_import from __future__ to ensure that Python 2.7
behaves the same way as Python 3.

Change-Id: Ica06ed95814e9cd3e768b3e1785075e36f6e56d0
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/16708
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2019-03-18 15:13:52 +00:00
Jason Lowe-Power
173227b390 learning_gem5: Add a simple config for MI_example
Adds a new config script to configure the MI_example protocol. This script
closely follows the script used for MSI, but instead supports the
MI_example protocol. This script works with the simple_ruby runscript and
can be included instead of msi_caches.

Change-Id: I8be0be67bf51369763ba103a5f101cfc01ad8859
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/8945
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2018-03-23 15:50:28 +00:00
Jason Lowe-Power
d9f9b80dc9 learning_gem5: Ruby random tester files for MSI
Adds a pair of scripts to run the Ruby random tester with the MSI protocol.

This code follows Learning gem5 Part 3.
http://learning.gem5.org/book/part3/index.html

Change-Id: I15550a36618546f0354163b0216cf771f434ed84
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/8944
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2018-03-23 15:50:28 +00:00
Jason Lowe-Power
adbfde6dff learning_gem5: Add config files for MSI protocol
Adds the required configuration files to run the MSI protocol. These
config files are much simpler than the current Ruby examples and follow
the pattern in the other Learning gem5 run scripts.

By default, this script runs with two CPUs and runs the recently added
thread test binary.

Currently, only SE mode is supported.

This code follows Learning gem5 Part 3.
http://learning.gem5.org/book/part3/index.html

Change-Id: I813a3153d49e47198444c38a6af30269bd1310cd
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/8943
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2018-03-23 15:50:28 +00:00