arch: Eliminate the GuestByteOrder constant.

Most ISAs used that constant exactly once, when setting up a Process.
This change just propogates the constant to the one place it's used. In
MIPS, the endianness is hard coded as little. There were some checks
which would change the behavior if the endianness was big. This change
removes that dead code. If someone wants to add support for big endian
MIPS, they can go back and add in the small bits of code that would be
required. It's likely the existing big endian support was incomplete and
not tested, so it's probably best for someone interested in it to start
fresh anyway.

Change-Id: Ife6ffcf4bca40001d5d9126f7d795f954f66bb22
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40178
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>

src/arch/mips/process.cc

@@ -37,6 +37,7 @@
 #include "mem/page_table.hh"
 #include "params/Process.hh"
 #include "sim/aux_vector.hh"
+#include "sim/byteswap.hh"
 #include "sim/process.hh"
 #include "sim/process_impl.hh"
 #include "sim/syscall_return.hh"
@@ -184,7 +185,7 @@ MipsProcess::argsInit(int pageSize)
     // Copy the aux vector
     Addr auxv_array_end = auxv_array_base;
     for (const auto &aux: auxv) {
-        initVirtMem->write(auxv_array_end, aux, GuestByteOrder);
+        initVirtMem->write(auxv_array_end, aux, ByteOrder::little);
         auxv_array_end += sizeof(aux);
     }