arch-riscv: add exception code to DPRINTFS msg (#1153)

Change-Id: Ib5d1dc991f18256ec634c604c776629ea31317a9
2024-05-21 18:59:25 +02:00
parent 5e20438c1c
commit 688f8fb03b
1 changed files with 2 additions and 2 deletions
--- a/src/arch/riscv/faults.cc
+++ b/src/arch/riscv/faults.cc
@@ -61,8 +61,8 @@ RiscvFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
 {
    auto pc_state = tc->pcState().as<PCState>();

-    DPRINTFS(Faults, tc->getCpuPtr(), "Fault (%s) at PC: %s\n",
-             name(), pc_state);
+    DPRINTFS(Faults, tc->getCpuPtr(), "Fault (%s, %u) at PC: %s\n",
+             name(), exception(), pc_state);

    if (FullSystem) {
        PrivilegeMode pp = (PrivilegeMode)tc->readMiscReg(MISCREG_PRV);