f6b987f777
Add functionality to select comments and directly delete/edit them
...
It's now possible to select comments directly in the traceplot instead
of selecting them in the CommentTreeWidget.
Selections from the TreeWidget are synchronized to the plot but not vice
versa.
It would generally be the better to introduce a Model/View based
approach instead of trying to synchronize selections and QActions.
2021-09-16 16:10:16 +02:00
6d99853f3c
Display the MemSpec in a TreeView
2021-09-09 16:53:14 +02:00
b89a881ffa
Display the McConfig in a TableView
2021-09-09 16:53:13 +02:00
Lukas Steiner
3d6fd929ea
Merge branch 'develop' into 'work/vcd_export'
...
# Conflicts:
# DRAMSys/traceAnalyzer/tracefiletab.cpp
2021-08-30 11:45:55 +00:00
11235c686f
Make TraceAnalyzer compatible with Qwt 6.2
...
Fix some includes, that caused compilation failures with Qwt 6.2
2021-08-27 10:03:03 +02:00
93089ce1f6
Move VCD export to seperate thread and add R/W information to all phases
2021-08-26 11:00:25 +02:00
65aa8e83e0
Make a singleton out of the PythonCaller
...
Prevents unnecessary instances of PythonCaller.
2021-08-16 15:40:24 +02:00
Lukas Steiner
a817f819a2
Merge branch 'work/vcd_export' into 'develop'
...
Add export option for VCD dumps
See merge request ems/astdm/dram.sys!299
2021-08-16 07:45:56 +00:00
4d00613aba
Add export option for VCD dumps
...
Add support for exporting the plot into a vcd file. The
python script uses the pyvcd library.
2021-08-11 12:05:08 +02:00
36138df0f6
Implement TraceSelector
...
The TraceSelector enables the user to fully customize the displayed
plot: Reordering of all rows of the plot is possible as well as
removing, adding and duplicating as desired.
The customization can be achieved by double clicking the respective item
in the TraceSelector or by dragging and dropping the item into the lower
tree view.
2021-07-28 15:14:17 +02:00
6574e6855c
Update authors in TraceAnalyzer
2021-06-14 13:28:57 +02:00
f626badc54
Make ranks collapsible in TraceAnalyzer
...
All individual ranks in the TraceAnalyzer are now collapsible, making it
easier to display simulation results with many ranks.
2021-06-14 10:14:16 +02:00
b2345be678
Add a scroll bar for TraceAnalyzer
...
A scroll bar was added to the TraceAnalyzer to prepare for the upcoming
changes of collapsing/folding ranks to increase readability when many
ranks are displayed. The scroll bar is hidden up to a number of 25 rows
in the TracePlot.
2021-06-14 09:42:20 +02:00
Matthias Jung
e7b7653029
Some changes in analyzer
2020-11-23 14:41:21 +01:00
Matthias Jung
981637188f
Added Power Analysis in Trace Analyzer
2020-11-11 10:31:49 +01:00
Matthias Jung
11bfed8b6a
Finished Latency Analysis Tool in TA
2020-11-02 19:53:53 +01:00
Matthias Jung
c744c43ab2
Added first latency analysis
2020-10-27 21:29:39 +01:00
Lukas Steiner
bacf0017ba
Resolve merge conflicts.
2020-07-06 17:57:04 +02:00
Lukas Steiner
0e0b80d646
Merge branch 'development'
...
# Conflicts:
# .gitlab-ci.yml
# DRAMSys/CMakeLists.txt
# DRAMSys/gem5/CMakeLists.txt
# DRAMSys/library/CMakeLists.txt
# DRAMSys/library/resources/configs/mcconfigs/fifo.json
# DRAMSys/library/resources/configs/mcconfigs/fifoStrict.json
# DRAMSys/library/resources/configs/mcconfigs/fr_fcfs.json
# DRAMSys/library/resources/configs/mcconfigs/fr_fcfs_grp.json
# DRAMSys/library/resources/configs/memspecs/HBM2.json
# DRAMSys/library/resources/configs/memspecs/JEDEC_256Mb_WIDEIO-200_128bit.json
# DRAMSys/library/resources/configs/memspecs/JEDEC_256Mb_WIDEIO-266_128bit.json
# DRAMSys/library/resources/configs/memspecs/JEDEC_4Gb_DDR4-1866_8bit_A.json
# DRAMSys/library/resources/configs/memspecs/JEDEC_4Gb_DDR4-2400_8bit_A.json
# DRAMSys/library/resources/configs/memspecs/JEDEC_4x64_2Gb_WIDEIO2-400_64bit.json
# DRAMSys/library/resources/configs/memspecs/JEDEC_4x64_2Gb_WIDEIO2-533_64bit.json
# DRAMSys/library/resources/configs/memspecs/JEDEC_8Gb_LPDDR4-3200_16bit.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR2-1066_16bit_H.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR2-800_16bit_H.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_16bit_G.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_2s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_3s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_mu.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_8bit_G.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_2s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_3s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_mu.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_2s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_3s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_less_refresh.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_mu.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-800_8bit_G.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2GB_DDR3-1066_64bit_D_SODIMM.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2GB_DDR3-1066_64bit_G_UDIMM.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2GB_DDR3-1333_64bit_D_SODIMM.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2GB_DDR3-1600_64bit_G_UDIMM.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1066_8bit_D.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1066_8bit_D_2s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1066_8bit_D_3s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1066_8bit_D_mu.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1600_16bit_D.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_2s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_3s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_mu.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_LPDDR-266_16bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_LPDDR-333_16bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_LPDDR2-1066-S4_16bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_LPDDR2-800-S4_16bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_4Gb_DDR4-2400_8bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_4Gb_LPDDR3-1333_32bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_4Gb_LPDDR3-1600_32bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_6Gb_LPDDR4-3200_32bit_A.json
# DRAMSys/library/resources/configs/memspecs/SAMSUNG_K4B1G1646E_1Gb_DDR3-1600_16bit.json
# DRAMSys/library/resources/configs/memspecs/SAMSUNG_K4B4G1646Q_4Gb_DDR3-1066_16bit.json
# DRAMSys/library/resources/configs/memspecs/memspec_ranktest.json
# DRAMSys/library/resources/configs/simulator/ddr3.json
# DRAMSys/library/resources/configs/simulator/ddr3_ecc.json
# DRAMSys/library/resources/configs/simulator/ddr3_gem5_se.json
# DRAMSys/library/resources/configs/simulator/ddr4.json
# DRAMSys/library/resources/configs/simulator/hbm2.json
# DRAMSys/library/resources/configs/simulator/lpddr4.json
# DRAMSys/library/resources/configs/simulator/wideio.json
# DRAMSys/library/resources/configs/simulator/wideio_ecc.json
# DRAMSys/library/resources/configs/simulator/wideio_thermal.json
# DRAMSys/library/src/common/TlmRecorder.cpp
# DRAMSys/library/src/common/utils.cpp
# DRAMSys/library/src/common/utils.h
# DRAMSys/library/src/configuration/Configuration.cpp
# DRAMSys/library/src/configuration/memspec/MemSpec.cpp
# DRAMSys/library/src/configuration/memspec/MemSpec.h
# DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecGDDR5.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecGDDR5X.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecGDDR6.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecWideIO2.cpp
# DRAMSys/library/src/controller/Controller.cpp
# DRAMSys/library/src/controller/ControllerRecordable.cpp
# DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp
# DRAMSys/library/src/simulation/Arbiter.cpp
# DRAMSys/library/src/simulation/DRAMSys.cpp
# DRAMSys/library/src/simulation/DRAMSysRecordable.cpp
# DRAMSys/library/src/simulation/Setup.h
# DRAMSys/library/src/simulation/dram/DramRecordable.cpp
# DRAMSys/pct/createPlatform.tcl
# DRAMSys/simulator/CMakeLists.txt
# DRAMSys/tests/DDR3/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml
# DRAMSys/tests/DDR3/configs/mcconfigs/fifoStrict.xml
# DRAMSys/tests/DDR3/configs/mcconfigs/fr_fcfs.xml
# DRAMSys/tests/DDR4/configs/simulator/ddr4.json
# DRAMSys/tests/ddr3_multirank/configs/simulator/ddr3.json
# DRAMSys/tests/lpddr4/configs/amconfigs/am_lpddr4_8Gbx16_brc.json
# README.md
2020-07-06 17:39:23 +02:00
Lukas Steiner
f0a5f07345
Rename TUK, add missing disclaimers.
2020-07-03 14:20:48 +02:00
Lukas Steiner
6383a1fce5
Revert "Merge branch 'opensource_splitting' into 'master'"
...
This reverts merge request !251
2020-06-05 16:26:29 +02:00
Lukas Steiner
6db1b75dd9
Renaming of explicit content.
2020-04-27 17:28:05 +02:00
Éder F. Zulian
5b67f2b268
Coding-style applied the project.
...
$ cd util
$ ./make_pretty.sh
2018-05-29 11:38:54 +02:00
Matthias Jung
14c4a041bd
Reorganized such that build dependencies wont fail
...
Also some LPDDR4 starting was conducted
2017-10-03 18:20:13 -04:00
